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commit ef43283c67d358e654948e97ce78a524ca1c221d Author: Xiang Xiao <xiaoxi...@xiaomi.com> AuthorDate: Sun Sep 18 17:42:16 2022 +0800 arch/arm: Unify arm_cpu_sgi to up_trigger_irq Signed-off-by: Xiang Xiao <xiaoxi...@xiaomi.com> --- arch/arm/src/armv7-a/Kconfig | 1 + arch/arm/src/armv7-a/arm_cpupause.c | 23 +++------ arch/arm/src/armv7-a/arm_cpustart.c | 3 +- arch/arm/src/armv7-a/arm_gicv2.c | 22 ++++++++ arch/arm/src/armv7-a/gic.h | 3 +- arch/arm/src/armv7-m/arm_trigger_irq.c | 2 +- arch/arm/src/armv7-r/Kconfig | 1 + arch/arm/src/armv7-r/arm_gicv2.c | 26 ++-------- arch/arm/src/armv7-r/gic.h | 91 +++++++++++++++++++++++++--------- arch/arm/src/armv8-m/arm_trigger_irq.c | 2 +- arch/ceva/src/xc5/up_intc.c | 2 +- arch/ceva/src/xm6/up_intc.c | 2 +- include/nuttx/arch.h | 2 +- 13 files changed, 111 insertions(+), 69 deletions(-) diff --git a/arch/arm/src/armv7-a/Kconfig b/arch/arm/src/armv7-a/Kconfig index 22fe1a45c9..489b90d16d 100644 --- a/arch/arm/src/armv7-a/Kconfig +++ b/arch/arm/src/armv7-a/Kconfig @@ -7,6 +7,7 @@ comment "ARMv7-A Configuration Options" config ARMV7A_HAVE_GICv2 bool + select ARCH_HAVE_IRQTRIGGER default n ---help--- Selected by the configuration tool if the architecture supports the diff --git a/arch/arm/src/armv7-a/arm_cpupause.c b/arch/arm/src/armv7-a/arm_cpupause.c index 261418a28c..6c5ba07d28 100644 --- a/arch/arm/src/armv7-a/arm_cpupause.c +++ b/arch/arm/src/armv7-a/arm_cpupause.c @@ -241,8 +241,6 @@ int arm_pause_handler(int irq, void *context, void *arg) int up_cpu_pause(int cpu) { - int ret; - DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu()); #ifdef CONFIG_SCHED_INSTRUMENTATION @@ -267,22 +265,13 @@ int up_cpu_pause(int cpu) /* Execute SGI2 */ - ret = arm_cpu_sgi(GIC_IRQ_SGI2, (1 << cpu)); - if (ret < 0) - { - /* What happened? Unlock the g_cpu_wait spinlock */ - - spin_unlock(&g_cpu_wait[cpu]); - } - else - { - /* Wait for the other CPU to unlock g_cpu_paused meaning that - * it is fully paused and ready for up_cpu_resume(); - */ + arm_cpu_sgi(GIC_IRQ_SGI2, (1 << cpu)); - spin_lock(&g_cpu_paused[cpu]); - } + /* Wait for the other CPU to unlock g_cpu_paused meaning that + * it is fully paused and ready for up_cpu_resume(); + */ + spin_lock(&g_cpu_paused[cpu]); spin_unlock(&g_cpu_paused[cpu]); /* On successful return g_cpu_wait will be locked, the other CPU will be @@ -290,7 +279,7 @@ int up_cpu_pause(int cpu) * called. g_cpu_paused will be unlocked in any case. */ - return ret; + return OK; } /**************************************************************************** diff --git a/arch/arm/src/armv7-a/arm_cpustart.c b/arch/arm/src/armv7-a/arm_cpustart.c index 83681cecc9..27a9905fa8 100644 --- a/arch/arm/src/armv7-a/arm_cpustart.c +++ b/arch/arm/src/armv7-a/arm_cpustart.c @@ -160,7 +160,8 @@ int up_cpu_start(int cpu) /* Execute SGI1 */ - return arm_cpu_sgi(GIC_IRQ_SGI1, (1 << cpu)); + arm_cpu_sgi(GIC_IRQ_SGI1, (1 << cpu)); + return OK; } #endif /* CONFIG_SMP */ diff --git a/arch/arm/src/armv7-a/arm_gicv2.c b/arch/arm/src/armv7-a/arm_gicv2.c index acb12e5f20..2f2e44359d 100644 --- a/arch/arm/src/armv7-a/arm_gicv2.c +++ b/arch/arm/src/armv7-a/arm_gicv2.c @@ -504,6 +504,28 @@ int up_prioritize_irq(int irq, int priority) return -EINVAL; } +/**************************************************************************** + * Name: up_trigger_irq + * + * Description: + * Perform a Software Generated Interrupt (SGI). If CONFIG_SMP is + * selected, then the SGI is sent to all CPUs specified in the CPU set. + * That set may include the current CPU. + * + * If CONFIG_SMP is not selected, the cpuset is ignored and SGI is sent + * only to the current CPU. + * + * Input Parameters + * irq - The SGI interrupt ID (0-15) + * cpuset - The set of CPUs to receive the SGI + * + ****************************************************************************/ + +void up_trigger_irq(int irq, cpu_set_t cpuset) +{ + arm_cpu_sgi(irq, cpuset); +} + /**************************************************************************** * Name: arm_gic_irq_trigger * diff --git a/arch/arm/src/armv7-a/gic.h b/arch/arm/src/armv7-a/gic.h index 240b23874f..b4fd3d9c29 100644 --- a/arch/arm/src/armv7-a/gic.h +++ b/arch/arm/src/armv7-a/gic.h @@ -681,7 +681,7 @@ static inline unsigned int arm_gic_nlines(void) * ****************************************************************************/ -static inline int arm_cpu_sgi(int sgi, unsigned int cpuset) +static inline void arm_cpu_sgi(int sgi, unsigned int cpuset) { uint32_t regval; @@ -694,7 +694,6 @@ static inline int arm_cpu_sgi(int sgi, unsigned int cpuset) #endif putreg32(regval, GIC_ICDSGIR); - return OK; } /**************************************************************************** diff --git a/arch/arm/src/armv7-m/arm_trigger_irq.c b/arch/arm/src/armv7-m/arm_trigger_irq.c index 048053339f..0b3af502a5 100644 --- a/arch/arm/src/armv7-m/arm_trigger_irq.c +++ b/arch/arm/src/armv7-m/arm_trigger_irq.c @@ -47,7 +47,7 @@ * ****************************************************************************/ -void up_trigger_irq(int irq) +void up_trigger_irq(int irq, cpu_set_t cpuset) { uint32_t pend_bit = 0; diff --git a/arch/arm/src/armv7-r/Kconfig b/arch/arm/src/armv7-r/Kconfig index b0679a4f20..d0bb60f590 100644 --- a/arch/arm/src/armv7-r/Kconfig +++ b/arch/arm/src/armv7-r/Kconfig @@ -7,6 +7,7 @@ comment "ARMv7-R Configuration Options" config ARMV7R_HAVE_GICv2 bool "ARMV7R_GICv2 support" + select ARCH_HAVE_IRQTRIGGER default y ---help--- Selected by the configuration tool if the architecture supports the diff --git a/arch/arm/src/armv7-r/arm_gicv2.c b/arch/arm/src/armv7-r/arm_gicv2.c index f95f775ee5..9de974bea5 100644 --- a/arch/arm/src/armv7-r/arm_gicv2.c +++ b/arch/arm/src/armv7-r/arm_gicv2.c @@ -504,7 +504,7 @@ int up_prioritize_irq(int irq, int priority) } /**************************************************************************** - * Name: arm_cpu_sgi + * Name: up_trigger_irq * * Description: * Perform a Software Generated Interrupt (SGI). If CONFIG_SMP is @@ -515,30 +515,14 @@ int up_prioritize_irq(int irq, int priority) * only to the current CPU. * * Input Parameters - * sgi - The SGI interrupt ID (0-15) + * irq - The SGI interrupt ID (0-15) * cpuset - The set of CPUs to receive the SGI * - * Returned Value: - * OK is always returned at present. - * ****************************************************************************/ -int arm_cpu_sgi(int sgi, unsigned int cpuset) +void up_trigger_irq(int irq, cpu_set_t cpuset) { - uint32_t regval; - -#ifdef CONFIG_SMP - regval = GIC_ICDSGIR_INTID(sgi) | - GIC_ICDSGIR_CPUTARGET(cpuset) | - GIC_ICDSGIR_TGTFILTER_LIST; -#else - regval = GIC_ICDSGIR_INTID(sgi) | - GIC_ICDSGIR_CPUTARGET(0) | - GIC_ICDSGIR_TGTFILTER_THIS; -#endif - - putreg32(regval, GIC_ICDSGIR); - return OK; + arm_cpu_sgi(irq, cpuset); } -#endif /* CONFIG_ARMV7R_HAVE_GICv2 */ +#endif /* CONFIG_ARMV7R_HAVE_GICv2 */ diff --git a/arch/arm/src/armv7-r/gic.h b/arch/arm/src/armv7-r/gic.h index 6ed485bf0f..da694bc089 100644 --- a/arch/arm/src/armv7-r/gic.h +++ b/arch/arm/src/armv7-r/gic.h @@ -531,10 +531,77 @@ #define GIC_IRQ_SPI 32 /* First SPI interrupt ID */ /**************************************************************************** - * Public Function Prototypes + * Inline Functions ****************************************************************************/ #ifndef __ASSEMBLY__ + +/**************************************************************************** + * Name: arm_gic_nlines + * + * Description: + * Return the number of interrupt lines supported by this GIC + * implementation (include both PPIs (32) and SPIs). + * + * Input Parameters: + * None + * + * Returned Value: + * The number of interrupt lines. + * + ****************************************************************************/ + +static inline unsigned int arm_gic_nlines(void) +{ + uint32_t regval; + uint32_t field; + + /* Get the number of interrupt lines. */ + + regval = getreg32(GIC_ICDICTR); + field = (regval & GIC_ICDICTR_ITLINES_MASK) >> GIC_ICDICTR_ITLINES_SHIFT; + return (field + 1) << 5; +} + +/**************************************************************************** + * Name: arm_cpu_sgi + * + * Description: + * Perform a Software Generated Interrupt (SGI). If CONFIG_SMP is + * selected, then the SGI is sent to all CPUs specified in the CPU set. + * That set may include the current CPU. + * + * If CONFIG_SMP is not selected, the cpuset is ignored and SGI is sent + * only to the current CPU. + * + * Input Parameters: + * sgi - The SGI interrupt ID (0-15) + * cpuset - The set of CPUs to receive the SGI + * + * Returned Value: + * OK is always returned at present. + * + ****************************************************************************/ + +static inline void arm_cpu_sgi(int sgi, unsigned int cpuset) +{ + uint32_t regval; + +#ifdef CONFIG_SMP + regval = GIC_ICDSGIR_INTID(sgi) | GIC_ICDSGIR_CPUTARGET(cpuset) | + GIC_ICDSGIR_TGTFILTER_LIST; +#else + regval = GIC_ICDSGIR_INTID(sgi) | GIC_ICDSGIR_CPUTARGET(0) | + GIC_ICDSGIR_TGTFILTER_THIS; +#endif + + putreg32(regval, GIC_ICDSGIR); +} + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + #ifdef __cplusplus #define EXTERN extern "C" extern "C" @@ -594,28 +661,6 @@ void arm_gic_initialize(void); uint32_t *arm_decodeirq(uint32_t *regs); -/**************************************************************************** - * Name: arm_cpu_sgi - * - * Description: - * Perform a Software Generated Interrupt (SGI). If CONFIG_SMP is - * selected, then the SGI is sent to all CPUs specified in the CPU set. - * That set may include the current CPU. - * - * If CONFIG_SMP is not selected, the cpuset is ignored and SGI is sent - * only to the current CPU. - * - * Input Parameters - * sgi - The SGI interrupt ID (0-15) - * cpuset - The set of CPUs to receive the SGI - * - * Returned Value: - * OK is always returned at present. - * - ****************************************************************************/ - -int arm_cpu_sgi(int sgi, unsigned int cpuset); - /**************************************************************************** * Name: arm_start_handler * diff --git a/arch/arm/src/armv8-m/arm_trigger_irq.c b/arch/arm/src/armv8-m/arm_trigger_irq.c index 9ffde567da..865267a512 100644 --- a/arch/arm/src/armv8-m/arm_trigger_irq.c +++ b/arch/arm/src/armv8-m/arm_trigger_irq.c @@ -47,7 +47,7 @@ * ****************************************************************************/ -void up_trigger_irq(int irq) +void up_trigger_irq(int irq, cpu_set_t cpuset) { uint32_t pend_bit = 0; diff --git a/arch/ceva/src/xc5/up_intc.c b/arch/ceva/src/xc5/up_intc.c index dffe36ac78..65f093b985 100644 --- a/arch/ceva/src/xc5/up_intc.c +++ b/arch/ceva/src/xc5/up_intc.c @@ -162,7 +162,7 @@ int up_prioritize_irq(int irq, int priority) ****************************************************************************/ #ifdef CONFIG_ARCH_HAVE_IRQTRIGGER -void up_trigger_irq(int irq) +void up_trigger_irq(int irq, cpu_set_t cpuset) { if (irq >= IRQ_VINT_FIRST) { diff --git a/arch/ceva/src/xm6/up_intc.c b/arch/ceva/src/xm6/up_intc.c index fb18382a07..0d29d2a06d 100644 --- a/arch/ceva/src/xm6/up_intc.c +++ b/arch/ceva/src/xm6/up_intc.c @@ -170,7 +170,7 @@ int up_prioritize_irq(int irq, int priority) ****************************************************************************/ #ifdef CONFIG_ARCH_HAVE_IRQTRIGGER -void up_trigger_irq(int irq) +void up_trigger_irq(int irq, cpu_set_t cpuset) { if (irq >= IRQ_VINT_FIRST) { diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h index 431d34122c..e4bdc9c19d 100644 --- a/include/nuttx/arch.h +++ b/include/nuttx/arch.h @@ -1498,7 +1498,7 @@ void up_disable_irq(int irq); ****************************************************************************/ #ifdef CONFIG_ARCH_HAVE_IRQTRIGGER -void up_trigger_irq(int irq); +void up_trigger_irq(int irq, cpu_set_t cpuset); #endif /****************************************************************************