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commit 079a6fa6cc1572be82e3048974db7c58dd80a425
Author: Xiang Xiao <xiaoxi...@xiaomi.com>
AuthorDate: Sun Sep 18 18:49:12 2022 +0800
arch/armv7[a|r]: Implement up_affinity_irq
Signed-off-by: Xiang Xiao <xiaoxi...@xiaomi.com>
---
arch/arm/src/armv7-a/arm_gicv2.c | 27 +++++++++++++++++++++++++++
arch/arm/src/armv7-r/arm_gicv2.c | 27 +++++++++++++++++++++++++++
include/nuttx/arch.h | 12 ++++++++++++
3 files changed, 66 insertions(+)
diff --git a/arch/arm/src/armv7-a/arm_gicv2.c b/arch/arm/src/armv7-a/arm_gicv2.c
index 3f7fc667ed..8f6f8ab34f 100644
--- a/arch/arm/src/armv7-a/arm_gicv2.c
+++ b/arch/arm/src/armv7-a/arm_gicv2.c
@@ -504,6 +504,33 @@ int up_prioritize_irq(int irq, int priority)
return -EINVAL;
}
+/****************************************************************************
+ * Name: up_affinity_irq
+ *
+ * Description:
+ * Set an IRQ affinity by software.
+ *
+ ****************************************************************************/
+
+void up_affinity_irq(int irq, cpu_set_t cpuset)
+{
+ if (irq >= GIC_IRQ_SPI && irq < NR_IRQS)
+ {
+ uintptr_t regaddr;
+ uint32_t regval;
+
+ /* Write the new cpuset to the corresponding field in the in the
+ * distributor Interrupt Processor Target Register (GIC_ICDIPTR).
+ */
+
+ regaddr = GIC_ICDIPTR(irq);
+ regval = getreg32(regaddr);
+ regval &= ~GIC_ICDIPTR_ID_MASK(irq);
+ regval |= GIC_ICDIPTR_ID(irq, cpuset);
+ putreg32(regval, regaddr);
+ }
+}
+
/****************************************************************************
* Name: up_trigger_irq
*
diff --git a/arch/arm/src/armv7-r/arm_gicv2.c b/arch/arm/src/armv7-r/arm_gicv2.c
index bd5f0cf79f..2da122198b 100644
--- a/arch/arm/src/armv7-r/arm_gicv2.c
+++ b/arch/arm/src/armv7-r/arm_gicv2.c
@@ -503,6 +503,33 @@ int up_prioritize_irq(int irq, int priority)
return -EINVAL;
}
+/****************************************************************************
+ * Name: up_affinity_irq
+ *
+ * Description:
+ * Set an IRQ affinity by software.
+ *
+ ****************************************************************************/
+
+void up_affinity_irq(int irq, cpu_set_t cpuset)
+{
+ if (irq >= GIC_IRQ_SPI && irq < NR_IRQS)
+ {
+ uintptr_t regaddr;
+ uint32_t regval;
+
+ /* Write the new cpuset to the corresponding field in the in the
+ * distributor Interrupt Processor Target Register (GIC_ICDIPTR).
+ */
+
+ regaddr = GIC_ICDIPTR(irq);
+ regval = getreg32(regaddr);
+ regval &= ~GIC_ICDIPTR_ID_MASK(irq);
+ regval |= GIC_ICDIPTR_ID(irq, cpuset);
+ putreg32(regval, regaddr);
+ }
+}
+
/****************************************************************************
* Name: up_trigger_irq
*
diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h
index e4bdc9c19d..467942e4ea 100644
--- a/include/nuttx/arch.h
+++ b/include/nuttx/arch.h
@@ -1489,6 +1489,18 @@ void up_enable_irq(int irq);
void up_disable_irq(int irq);
#endif
+/****************************************************************************
+ * Name: up_affinity_irq
+ *
+ * Description:
+ * Set an IRQ affinity by software.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+void up_affinity_irq(int irq, cpu_set_t cpuset);
+#endif
+
/****************************************************************************
* Name: up_trigger_irq
*
