xiaoxiang781216 commented on a change in pull request #5782:
URL: https://github.com/apache/incubator-nuttx/pull/5782#discussion_r830484837
##########
File path: arch/risc-v/include/csr.h
##########
@@ -299,25 +299,71 @@
/* In mstatus register */
+#define MSTATUS_UIE (0x1 << 0) /* User Interrupt Enable */
+#define MSTATUS_SIE (0x1 << 1) /* Supervisor Interrupt Enable */
#define MSTATUS_MIE (0x1 << 3) /* Machine Interrupt Enable */
+#define MSTATUS_SPIE (0x1 << 5) /* Supervisor Previous Interrupt Enable
*/
#define MSTATUS_MPIE (0x1 << 7) /* Machine Previous Interrupt Enable */
+#define MSTATUS_SPPS (0x1 << 8) /* Supervisor Previous Privilege
(s-mode) */
+#define MSTATUS_SPPU (0x0 << 8) /* Supervisor Previous Privilege
(u-mode) */
Review comment:
move MSTATUS_SPPU before MSTATUS_SPPS
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* CSR definitions */
+
+# define CSR_STATUS sstatus /* Global status register */
+# define CSR_GIE SSTATUS_SIE /* Global interrupt enable */
+# define CSR_GPIE SSTATUS_SPIE /* Previous interrupt enable */
Review comment:
change CSR_GIE/CSR_GPIE to STATUS_IE/STATUS_PIE
move after CSR section
##########
File path: arch/risc-v/src/common/riscv_internal.h
##########
@@ -32,6 +32,7 @@
# include <nuttx/arch.h>
# include <sys/types.h>
# include <stdint.h>
+# include <arch/syscall.h>
Review comment:
let's move the inclusion to the implementation
##########
File path: arch/risc-v/src/common/riscv_pthread_start.c
##########
@@ -66,11 +66,17 @@
void up_pthread_start(pthread_trampoline_t startup,
pthread_startroutine_t entrypt, pthread_addr_t arg)
{
+#ifdef CONFIG_ARCH_USE_S_MODE
+ /* Let ksys_call3() do all of the work */
+
+ ksys_call3(SYS_pthread_start, (uintptr_t)startup, (uintptr_t)entrypt,
Review comment:
can we map sys_call3 to ksys_call3 by checking CONFIG_ARCH_USE_S_MODE,
just like what we done for CSR?
##########
File path: arch/risc-v/include/syscall.h
##########
@@ -57,6 +57,7 @@
/* RV64GC system calls ******************************************************/
+#ifndef CONFIG_ARCH_USE_S_MODE
Review comment:
I think the first thread syscall still need in flat/protected mode.
##########
File path: arch/risc-v/include/csr.h
##########
@@ -299,25 +299,71 @@
/* In mstatus register */
+#define MSTATUS_UIE (0x1 << 0) /* User Interrupt Enable */
+#define MSTATUS_SIE (0x1 << 1) /* Supervisor Interrupt Enable */
#define MSTATUS_MIE (0x1 << 3) /* Machine Interrupt Enable */
+#define MSTATUS_SPIE (0x1 << 5) /* Supervisor Previous Interrupt Enable
*/
#define MSTATUS_MPIE (0x1 << 7) /* Machine Previous Interrupt Enable */
+#define MSTATUS_SPPS (0x1 << 8) /* Supervisor Previous Privilege
(s-mode) */
+#define MSTATUS_SPPU (0x0 << 8) /* Supervisor Previous Privilege
(u-mode) */
#define MSTATUS_MPPM (0x3 << 11) /* Machine Previous Privilege (m-mode) */
+#define MSTATUS_MPPS (0x1 << 11) /* Machine Previous Privilege (s-mode) */
+#define MSTATUS_MPPU (0x0 << 11) /* Machine Previous Privilege (u-mode) */
Review comment:
move MSTATUS_MPPM after MSTATUS_MPPU
##########
File path: arch/risc-v/include/csr.h
##########
@@ -299,25 +299,71 @@
/* In mstatus register */
+#define MSTATUS_UIE (0x1 << 0) /* User Interrupt Enable */
+#define MSTATUS_SIE (0x1 << 1) /* Supervisor Interrupt Enable */
#define MSTATUS_MIE (0x1 << 3) /* Machine Interrupt Enable */
+#define MSTATUS_SPIE (0x1 << 5) /* Supervisor Previous Interrupt Enable
*/
#define MSTATUS_MPIE (0x1 << 7) /* Machine Previous Interrupt Enable */
+#define MSTATUS_SPPS (0x1 << 8) /* Supervisor Previous Privilege
(s-mode) */
+#define MSTATUS_SPPU (0x0 << 8) /* Supervisor Previous Privilege
(u-mode) */
#define MSTATUS_MPPM (0x3 << 11) /* Machine Previous Privilege (m-mode) */
+#define MSTATUS_MPPS (0x1 << 11) /* Machine Previous Privilege (s-mode) */
+#define MSTATUS_MPPU (0x0 << 11) /* Machine Previous Privilege (u-mode) */
Review comment:
move MSTATUS_MPPM after MSTATUS_MPPU
##########
File path: arch/risc-v/include/irq.h
##########
@@ -565,9 +576,9 @@ static inline irqstate_t up_irq_save(void)
__asm__ __volatile__
(
- "csrrc %0, mstatus, %1\n"
+ "csrrc %0, " CSR_XSTR(CSR_STATUS) ", %1\n"
: "=r" (flags)
- : "r"(MSTATUS_MIE)
Review comment:
can we remove this line?
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* CSR definitions */
+
+# define CSR_STATUS sstatus /* Global status register */
+# define CSR_GIE SSTATUS_SIE /* Global interrupt enable */
+# define CSR_GPIE SSTATUS_SPIE /* Previous interrupt enable */
Review comment:
change CSR_GIE/CSR_GPIE to STATUS_IE/STATUS_PIE
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* CSR definitions */
+
+# define CSR_STATUS sstatus /* Global status register */
+# define CSR_GIE SSTATUS_SIE /* Global interrupt enable */
+# define CSR_GPIE SSTATUS_SPIE /* Previous interrupt enable */
+# define CSR_EPC sepc /* Exception program counter */
+# define CSR_IE sie /* Interrupt enable register */
+
+/* Interrupt bits */
+
+# define IE_EIE SIE_SEIE /* External interrupt enable */
+# define IE_SIE SIE_SSIE /* Software interrupt enable */
+# define IE_TIE SIE_STIE /* Timer interrupt enable */
+
+/* Privilege control */
+
+# define STATUS_PPX SSTATUS_SPPS /* Previous privilege */
+# define STATUS_SUM SSTATUS_SUM /* Access to user memory */
Review comment:
STATUS_SUM->STATUS_UM
##########
File path: arch/risc-v/include/irq.h
##########
@@ -565,9 +576,9 @@ static inline irqstate_t up_irq_save(void)
__asm__ __volatile__
(
- "csrrc %0, mstatus, %1\n"
+ "csrrc %0, " CSR_XSTR(CSR_STATUS) ", %1\n"
: "=r" (flags)
- : "r"(MSTATUS_MIE)
Review comment:
can we remove this line?
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* CSR definitions */
+
+# define CSR_STATUS sstatus /* Global status register */
+# define CSR_GIE SSTATUS_SIE /* Global interrupt enable */
+# define CSR_GPIE SSTATUS_SPIE /* Previous interrupt enable */
+# define CSR_EPC sepc /* Exception program counter */
+# define CSR_IE sie /* Interrupt enable register */
+
+/* Interrupt bits */
+
+# define IE_EIE SIE_SEIE /* External interrupt enable */
+# define IE_SIE SIE_SSIE /* Software interrupt enable */
+# define IE_TIE SIE_STIE /* Timer interrupt enable */
+
+/* Privilege control */
+
+# define STATUS_PPX SSTATUS_SPPS /* Previous privilege */
+# define STATUS_SUM SSTATUS_SUM /* Access to user memory */
+
+/* External, timer and software interrupt */
+
+# define RISCV_IRQ_EXT RISCV_IRQ_SEXT /* PLIC IRQ */
+# define RISCV_IRQ_TIMER RISCV_IRQ_STIMER /* Timer IRQ */
+# define RISCV_IRQ_SOFT RISCV_IRQ_SSOFT /* SW IRQ */
+
+#else
+
+/* CSR definitions */
+
+# define CSR_STATUS mstatus /* Global status register */
+# define CSR_GIE MSTATUS_MIE /* Global interrupt enable */
+# define CSR_GPIE MSTATUS_MPIE /* Previous interrupt enable */
Review comment:
ditto
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* CSR definitions */
+
+# define CSR_STATUS sstatus /* Global status register */
+# define CSR_GIE SSTATUS_SIE /* Global interrupt enable */
+# define CSR_GPIE SSTATUS_SPIE /* Previous interrupt enable */
+# define CSR_EPC sepc /* Exception program counter */
+# define CSR_IE sie /* Interrupt enable register */
+
+/* Interrupt bits */
+
+# define IE_EIE SIE_SEIE /* External interrupt enable */
+# define IE_SIE SIE_SSIE /* Software interrupt enable */
+# define IE_TIE SIE_STIE /* Timer interrupt enable */
+
+/* Privilege control */
+
+# define STATUS_PPX SSTATUS_SPPS /* Previous privilege */
+# define STATUS_SUM SSTATUS_SUM /* Access to user memory */
Review comment:
STATUS_SUM->STATUS_UM
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* CSR definitions */
+
+# define CSR_STATUS sstatus /* Global status register */
+# define CSR_GIE SSTATUS_SIE /* Global interrupt enable */
+# define CSR_GPIE SSTATUS_SPIE /* Previous interrupt enable */
+# define CSR_EPC sepc /* Exception program counter */
+# define CSR_IE sie /* Interrupt enable register */
+
+/* Interrupt bits */
+
+# define IE_EIE SIE_SEIE /* External interrupt enable */
+# define IE_SIE SIE_SSIE /* Software interrupt enable */
+# define IE_TIE SIE_STIE /* Timer interrupt enable */
+
+/* Privilege control */
+
+# define STATUS_PPX SSTATUS_SPPS /* Previous privilege */
+# define STATUS_SUM SSTATUS_SUM /* Access to user memory */
+
+/* External, timer and software interrupt */
+
+# define RISCV_IRQ_EXT RISCV_IRQ_SEXT /* PLIC IRQ */
+# define RISCV_IRQ_TIMER RISCV_IRQ_STIMER /* Timer IRQ */
+# define RISCV_IRQ_SOFT RISCV_IRQ_SSOFT /* SW IRQ */
+
+#else
+
+/* CSR definitions */
+
+# define CSR_STATUS mstatus /* Global status register */
+# define CSR_GIE MSTATUS_MIE /* Global interrupt enable */
+# define CSR_GPIE MSTATUS_MPIE /* Previous interrupt enable */
Review comment:
ditto
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* CSR definitions */
+
+# define CSR_STATUS sstatus /* Global status register */
+# define CSR_GIE SSTATUS_SIE /* Global interrupt enable */
+# define CSR_GPIE SSTATUS_SPIE /* Previous interrupt enable */
+# define CSR_EPC sepc /* Exception program counter */
+# define CSR_IE sie /* Interrupt enable register */
+
+/* Interrupt bits */
+
+# define IE_EIE SIE_SEIE /* External interrupt enable */
+# define IE_SIE SIE_SSIE /* Software interrupt enable */
+# define IE_TIE SIE_STIE /* Timer interrupt enable */
+
+/* Privilege control */
+
+# define STATUS_PPX SSTATUS_SPPS /* Previous privilege */
Review comment:
STATUS_PPX->STATUS_PP
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* CSR definitions */
+
+# define CSR_STATUS sstatus /* Global status register */
+# define CSR_GIE SSTATUS_SIE /* Global interrupt enable */
+# define CSR_GPIE SSTATUS_SPIE /* Previous interrupt enable */
+# define CSR_EPC sepc /* Exception program counter */
+# define CSR_IE sie /* Interrupt enable register */
+
+/* Interrupt bits */
+
+# define IE_EIE SIE_SEIE /* External interrupt enable */
+# define IE_SIE SIE_SSIE /* Software interrupt enable */
+# define IE_TIE SIE_STIE /* Timer interrupt enable */
+
+/* Privilege control */
+
+# define STATUS_PPX SSTATUS_SPPS /* Previous privilege */
+# define STATUS_SUM SSTATUS_SUM /* Access to user memory */
+
+/* External, timer and software interrupt */
+
+# define RISCV_IRQ_EXT RISCV_IRQ_SEXT /* PLIC IRQ */
+# define RISCV_IRQ_TIMER RISCV_IRQ_STIMER /* Timer IRQ */
+# define RISCV_IRQ_SOFT RISCV_IRQ_SSOFT /* SW IRQ */
+
+#else
+
+/* CSR definitions */
+
+# define CSR_STATUS mstatus /* Global status register */
+# define CSR_GIE MSTATUS_MIE /* Global interrupt enable */
+# define CSR_GPIE MSTATUS_MPIE /* Previous interrupt enable */
+# define CSR_EPC mepc /* Exception program counter */
+# define CSR_IE mie /* Interrupt enable register */
+
+/* Interrupt bits */
+
+# define IE_EIE MIE_MEIE /* External interrupt enable */
+# define IE_SIE MIE_MSIE /* Software interrupt enable */
+# define IE_TIE MIE_MTIE /* Timer interrupt enable */
+
+/* Privilege control */
+
+# define STATUS_PPX MSTATUS_MPPM /* Previous privilege */
+# define STATUS_SUM 0 /* Not needed in M-mode */
Review comment:
ditto
##########
File path: arch/risc-v/src/Makefile
##########
@@ -24,15 +24,24 @@ ifeq ($(CONFIG_OPENSBI),y)
include opensbi/Make.defs
endif
+# Kernel runs in supervisor mode or machine mode ?
+ifeq ($(CONFIG_ARCH_USE_S_MODE),y)
+ARCH_CMN_MODE_DIR = supervisor
+else
+ARCH_CMN_MODE_DIR = machine
+endif
+
ARCH_SRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src
INCLUDES += ${shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip}
INCLUDES += ${shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)common}
+INCLUDES += ${shell $(INCDIR) "$(CC)"
$(ARCH_SRCDIR)$(DELIM)common$(DELIM)$(ARCH_CMN_MODE_DIR)}
INCLUDES += ${shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)sched}
ifeq ($(CONFIG_OPENSBI),y)
INCLUDES += $(shell $(INCDIR) "$(CC)"
$(ARCH_SRCDIR)$(DELIM)opensbi$(DELIM)opensbi-3rdparty$(DELIM)include)
endif
+
Review comment:
revert?
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* CSR definitions */
+
+# define CSR_STATUS sstatus /* Global status register */
+# define CSR_GIE SSTATUS_SIE /* Global interrupt enable */
+# define CSR_GPIE SSTATUS_SPIE /* Previous interrupt enable */
+# define CSR_EPC sepc /* Exception program counter */
+# define CSR_IE sie /* Interrupt enable register */
+
+/* Interrupt bits */
+
+# define IE_EIE SIE_SEIE /* External interrupt enable */
+# define IE_SIE SIE_SSIE /* Software interrupt enable */
+# define IE_TIE SIE_STIE /* Timer interrupt enable */
+
+/* Privilege control */
+
+# define STATUS_PPX SSTATUS_SPPS /* Previous privilege */
+# define STATUS_SUM SSTATUS_SUM /* Access to user memory */
+
+/* External, timer and software interrupt */
+
+# define RISCV_IRQ_EXT RISCV_IRQ_SEXT /* PLIC IRQ */
+# define RISCV_IRQ_TIMER RISCV_IRQ_STIMER /* Timer IRQ */
+# define RISCV_IRQ_SOFT RISCV_IRQ_SSOFT /* SW IRQ */
+
+#else
+
+/* CSR definitions */
+
+# define CSR_STATUS mstatus /* Global status register */
+# define CSR_GIE MSTATUS_MIE /* Global interrupt enable */
+# define CSR_GPIE MSTATUS_MPIE /* Previous interrupt enable */
+# define CSR_EPC mepc /* Exception program counter */
+# define CSR_IE mie /* Interrupt enable register */
+
+/* Interrupt bits */
+
+# define IE_EIE MIE_MEIE /* External interrupt enable */
+# define IE_SIE MIE_MSIE /* Software interrupt enable */
+# define IE_TIE MIE_MTIE /* Timer interrupt enable */
+
+/* Privilege control */
+
+# define STATUS_PPX MSTATUS_MPPM /* Previous privilege */
+# define STATUS_SUM 0 /* Not needed in M-mode */
Review comment:
ditto
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* CSR definitions */
+
+# define CSR_STATUS sstatus /* Global status register */
+# define CSR_GIE SSTATUS_SIE /* Global interrupt enable */
+# define CSR_GPIE SSTATUS_SPIE /* Previous interrupt enable */
+# define CSR_EPC sepc /* Exception program counter */
+# define CSR_IE sie /* Interrupt enable register */
+
+/* Interrupt bits */
+
+# define IE_EIE SIE_SEIE /* External interrupt enable */
+# define IE_SIE SIE_SSIE /* Software interrupt enable */
+# define IE_TIE SIE_STIE /* Timer interrupt enable */
+
+/* Privilege control */
+
+# define STATUS_PPX SSTATUS_SPPS /* Previous privilege */
Review comment:
STATUS_PPX->STATUS_PP
##########
File path: arch/risc-v/src/Makefile
##########
@@ -24,15 +24,24 @@ ifeq ($(CONFIG_OPENSBI),y)
include opensbi/Make.defs
endif
+# Kernel runs in supervisor mode or machine mode ?
+ifeq ($(CONFIG_ARCH_USE_S_MODE),y)
+ARCH_CMN_MODE_DIR = supervisor
+else
+ARCH_CMN_MODE_DIR = machine
+endif
+
ARCH_SRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src
INCLUDES += ${shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip}
INCLUDES += ${shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)common}
+INCLUDES += ${shell $(INCDIR) "$(CC)"
$(ARCH_SRCDIR)$(DELIM)common$(DELIM)$(ARCH_CMN_MODE_DIR)}
INCLUDES += ${shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)sched}
ifeq ($(CONFIG_OPENSBI),y)
INCLUDES += $(shell $(INCDIR) "$(CC)"
$(ARCH_SRCDIR)$(DELIM)opensbi$(DELIM)opensbi-3rdparty$(DELIM)include)
endif
+
Review comment:
revert?
##########
File path: arch/risc-v/src/common/riscv_internal.h
##########
@@ -32,6 +32,7 @@
# include <nuttx/arch.h>
# include <sys/types.h>
# include <stdint.h>
+# include <arch/syscall.h>
Review comment:
let's move the inclusion to the implementation
##########
File path: arch/risc-v/src/common/riscv_pthread_start.c
##########
@@ -66,11 +66,17 @@
void up_pthread_start(pthread_trampoline_t startup,
pthread_startroutine_t entrypt, pthread_addr_t arg)
{
+#ifdef CONFIG_ARCH_USE_S_MODE
+ /* Let ksys_call3() do all of the work */
+
+ ksys_call3(SYS_pthread_start, (uintptr_t)startup, (uintptr_t)entrypt,
Review comment:
can we map sys_call3 to ksys_call3 by checking CONFIG_ARCH_USE_S_MODE,
just like what we done for CSR?
##########
File path: arch/risc-v/src/common/riscv_signal_dispatch.c
##########
@@ -67,10 +67,17 @@
void up_signal_dispatch(_sa_sigaction_t sighand, int signo,
siginfo_t *info, void *ucontext)
{
+#ifdef CONFIG_ARCH_USE_S_MODE
+ /* Let ksys_call4() do all of the work */
+
+ ksys_call4(SYS_signal_handler, (uintptr_t)sighand, (uintptr_t)signo,
Review comment:
ditto
##########
File path: arch/risc-v/src/common/riscv_signal_dispatch.c
##########
@@ -67,10 +67,17 @@
void up_signal_dispatch(_sa_sigaction_t sighand, int signo,
siginfo_t *info, void *ucontext)
{
+#ifdef CONFIG_ARCH_USE_S_MODE
+ /* Let ksys_call4() do all of the work */
+
+ ksys_call4(SYS_signal_handler, (uintptr_t)sighand, (uintptr_t)signo,
Review comment:
ditto
##########
File path: arch/risc-v/src/common/riscv_releasepending.c
##########
@@ -78,7 +78,7 @@ void up_release_pending(void)
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
- riscv_savestate(rtcb->xcp.regs);
+ riscv_savestate(rtcb->xcp.regs);
Review comment:
the style change could move to another patch, so the simple change can
get merged more fast.
##########
File path: arch/risc-v/include/syscall.h
##########
@@ -57,6 +57,7 @@
/* RV64GC system calls ******************************************************/
+#ifndef CONFIG_ARCH_USE_S_MODE
Review comment:
I think the first thread syscall still need in flat/protected mode.
##########
File path: arch/risc-v/src/common/riscv_task_start.c
##########
@@ -63,11 +63,17 @@
void up_task_start(main_t taskentry, int argc, char *argv[])
{
+#ifdef CONFIG_ARCH_USE_S_MODE
+ /* Let ksys_call3() do all of the work */
+
+ ksys_call3(SYS_task_start, (uintptr_t)taskentry, (uintptr_t)argc,
Review comment:
ditto
##########
File path: arch/risc-v/src/common/riscv_releasepending.c
##########
@@ -78,7 +78,7 @@ void up_release_pending(void)
* Just copy the CURRENT_REGS into the OLD rtcb.
*/
- riscv_savestate(rtcb->xcp.regs);
+ riscv_savestate(rtcb->xcp.regs);
Review comment:
the style change could move to another patch, so the simple change can
get merged more fast.
##########
File path: arch/risc-v/src/common/riscv_task_start.c
##########
@@ -63,11 +63,17 @@
void up_task_start(main_t taskentry, int argc, char *argv[])
{
+#ifdef CONFIG_ARCH_USE_S_MODE
+ /* Let ksys_call3() do all of the work */
+
+ ksys_call3(SYS_task_start, (uintptr_t)taskentry, (uintptr_t)argc,
Review comment:
ditto
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