This is an automated email from the ASF dual-hosted git repository. xiaoxiang pushed a commit to branch master in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 4786963ee2bb48e4888f87b3cf0da6e5c2b9806e Author: Abdelatif Guettouche <abdelatif.guettou...@espressif.com> AuthorDate: Fri Mar 11 18:54:36 2022 +0100 xtensa_context.S: No need to save A2 before calling _xtensa_save_context. It uses CALL0, in this case A1 is callee saved and we can it directly. Signed-off-by: Abdelatif Guettouche <abdelatif.guettou...@espressif.com> --- arch/xtensa/src/common/xtensa_context.S | 46 ++++++++++++++-------------- arch/xtensa/src/common/xtensa_int_handlers.S | 6 ---- arch/xtensa/src/common/xtensa_panic.S | 2 +- arch/xtensa/src/common/xtensa_user_handler.S | 9 ++---- 4 files changed, 26 insertions(+), 37 deletions(-) diff --git a/arch/xtensa/src/common/xtensa_context.S b/arch/xtensa/src/common/xtensa_context.S index 6b8d2eb..845e0c5 100644 --- a/arch/xtensa/src/common/xtensa_context.S +++ b/arch/xtensa/src/common/xtensa_context.S @@ -114,34 +114,34 @@ _xtensa_context_save: - s32i a4, a2, (4 * REG_A4) - s32i a5, a2, (4 * REG_A5) - s32i a6, a2, (4 * REG_A6) - s32i a7, a2, (4 * REG_A7) - s32i a8, a2, (4 * REG_A8) - s32i a9, a2, (4 * REG_A9) - s32i a10, a2, (4 * REG_A10) - s32i a11, a2, (4 * REG_A11) + s32i a4, sp, (4 * REG_A4) + s32i a5, sp, (4 * REG_A5) + s32i a6, sp, (4 * REG_A6) + s32i a7, sp, (4 * REG_A7) + s32i a8, sp, (4 * REG_A8) + s32i a9, sp, (4 * REG_A9) + s32i a10, sp, (4 * REG_A10) + s32i a11, sp, (4 * REG_A11) /* Call0 ABI callee-saved regs a12-15 do not need to be saved here */ #ifndef __XTENSA_CALL0_ABI__ - s32i a12, a2, (4 * REG_A12) - s32i a13, a2, (4 * REG_A13) - s32i a14, a2, (4 * REG_A14) - s32i a15, a2, (4 * REG_A15) + s32i a12, sp, (4 * REG_A12) + s32i a13, sp, (4 * REG_A13) + s32i a14, sp, (4 * REG_A14) + s32i a15, sp, (4 * REG_A15) #endif rsr a3, SAR - s32i a3, a2, (4 * REG_SAR) + s32i a3, sp, (4 * REG_SAR) #if XCHAL_HAVE_LOOPS != 0 rsr a3, LBEG - s32i a3, a2, (4 * REG_LBEG) + s32i a3, sp, (4 * REG_LBEG) rsr a3, LEND - s32i a3, a2, (4 * REG_LEND) + s32i a3, sp, (4 * REG_LEND) rsr a3, LCOUNT - s32i a3, a2, (4 * REG_LCOUNT) + s32i a3, sp, (4 * REG_LCOUNT) #endif #ifndef __XTENSA_CALL0_ABI__ @@ -160,16 +160,16 @@ _xtensa_context_save: #error Overlay support is not implemented #endif - s32i a0, a2, (4 * REG_TMP0) /* Save return address */ - s32i sp, a2, (4 * REG_TMP1) /* Save current stack pointer */ - wsr a2, EXCSAVE_1 /* Preserve register save area */ + s32i a0, sp, (4 * REG_TMP0) /* Save return address */ + s32i sp, sp, (4 * REG_TMP1) /* Save current stack pointer */ + wsr sp, EXCSAVE_1 /* Preserve register save area */ - l32i sp, a2, (4 * REG_A1) /* Restore the interruptee's SP */ + l32i sp, sp, (4 * REG_A1) /* Restore the interruptee's SP */ call0 _xtensa_window_spill /* Preserves only a4-a5, a8-a9, a12-a13 */ - rsr a2, EXCSAVE_1 /* Save interruptee's a0 */ - l32i a0, a2, (4 * REG_TMP0) /* Save return address */ - l32i sp, a2, (4 * REG_TMP1) /* Save current stack pointer */ + rsr sp, EXCSAVE_1 /* Save interruptee's a0 */ + l32i a0, sp, (4 * REG_TMP0) /* Save return address */ + l32i sp, sp, (4 * REG_TMP1) /* Save current stack pointer */ #endif ret diff --git a/arch/xtensa/src/common/xtensa_int_handlers.S b/arch/xtensa/src/common/xtensa_int_handlers.S index c83d4cc..2bdb997 100644 --- a/arch/xtensa/src/common/xtensa_int_handlers.S +++ b/arch/xtensa/src/common/xtensa_int_handlers.S @@ -311,7 +311,6 @@ _xtensa_level1_handler: /* Save rest of interrupt context. */ s32i a2, sp, (4 * REG_A2) - mov a2, sp /* Address of state save on stack */ s32i a3, sp, (4 * REG_A3) call0 _xtensa_context_save /* Save full register state */ @@ -415,7 +414,6 @@ _xtensa_level2_handler: /* Save rest of interrupt context. */ s32i a2, sp, (4 * REG_A2) - mov a2, sp /* Address of state save on stack */ s32i a3, sp, (4 * REG_A3) call0 _xtensa_context_save /* Save full register state */ @@ -494,7 +492,6 @@ _xtensa_level3_handler: /* Save rest of interrupt context. */ s32i a2, sp, (4 * REG_A2) - mov a2, sp /* Address of state save on stack */ s32i a3, sp, (4 * REG_A3) call0 _xtensa_context_save /* Save full register state */ @@ -573,7 +570,6 @@ _xtensa_level4_handler: /* Save rest of interrupt context. */ s32i a2, sp, (4 * REG_A2) - mov a2, sp /* Address of state save on stack */ s32i a3, sp, (4 * REG_A3) call0 _xtensa_context_save /* Save full register state */ @@ -652,7 +648,6 @@ _xtensa_level5_handler: /* Save rest of interrupt context. */ s32i a2, sp, (4 * REG_A2) - mov a2, sp /* Address of state save on stack */ s32i a3, sp, (4 * REG_A3) call0 _xtensa_context_save /* Save full register state */ @@ -731,7 +726,6 @@ _xtensa_level6_handler: /* Save rest of interrupt context. */ s32i a2, sp, (4 * REG_A2) - mov a2, sp /* Address of state save on stack */ s32i a3, sp, (4 * REG_A3) call0 _xtensa_context_save /* Save full register state */ diff --git a/arch/xtensa/src/common/xtensa_panic.S b/arch/xtensa/src/common/xtensa_panic.S index 9ebd7c9..6a45d01 100644 --- a/arch/xtensa/src/common/xtensa_panic.S +++ b/arch/xtensa/src/common/xtensa_panic.S @@ -126,7 +126,7 @@ _xtensa_panic: * stack. */ - mov a2, sp /* Address of state save on stack */ + s32i a2, sp, (4 * REG_A2) s32i a3, sp, (4 * REG_A3) call0 _xtensa_context_save /* Save full register state */ diff --git a/arch/xtensa/src/common/xtensa_user_handler.S b/arch/xtensa/src/common/xtensa_user_handler.S index 9677ec7..ae8e3da 100644 --- a/arch/xtensa/src/common/xtensa_user_handler.S +++ b/arch/xtensa/src/common/xtensa_user_handler.S @@ -229,7 +229,6 @@ _xtensa_user_handler: /* Save rest of interrupt context. */ s32i a2, sp, (4 * REG_A2) - mov a2, sp /* Address of state save on stack */ s32i a3, sp, (4 * REG_A3) call0 _xtensa_context_save /* Save full register state */ @@ -343,8 +342,7 @@ _xtensa_syscall_handler: #if XCHAL_HAVE_LOOPS != 0 /* Save A2 and A3 now to give us some registers to work with. A0, A2 - * and A3 are now available. NOTE that A3 will get saved again in - * _xtensa_context_save(). + * and A3 are now available. */ s32i a2, sp, (4 * REG_A2) /* Save interruptee's A2 */ @@ -381,14 +379,12 @@ _xtensa_syscall_handler: wsr a0, EPC_1 /* Update PC */ s32i a0, sp, (4 * REG_PC) - /* Save a2 which will hold the argument to _xtensa_context_save*/ - s32i a2, sp, (4 * REG_A2) /* Save interruptee's A2 */ + s32i a3, sp, (4 * REG_A3) /* Save interruptee's A3 */ #endif /* Save rest of interrupt context. */ - mov a2, sp /* Address of state save on stack */ call0 _xtensa_context_save /* Save full register state */ /* Dispatch the sycall as with other interrupts. */ @@ -517,7 +513,6 @@ _xtensa_coproc_handler: /* Save rest of interrupt context. */ s32i a2, sp, (4 * REG_A2) - mov a2, sp /* Address of state save on stack */ s32i a3, sp, (4 * REG_A3) call0 _xtensa_context_save /* Save full register state */