davids5 commented on pull request #5523:
URL: https://github.com/apache/incubator-nuttx/pull/5523#issuecomment-1058139741


   CONFIG_ETH0_PHY_DP83848C=y now implies the pin is wired to the SoC as an 
interrupt, whenever the DP83848C PHY is used. This may not be the case, hence 
the comment about it being a board config related setting.
   
   I would imagine if the PHY interrupt pin is not wired to the SoC it would 
not be an issue for it to be configured unless this pin can be used for 
something else and it is:  
   
   7.2.1.3.1 Power Down and Interrupt
   The Power Down and Interrupt functions are multiplexed on pin 7 of the 
device. By default, this pin
   functions as a power-down input and the interrupt function is disabled. 
Setting bit 0 (INT_OE) of MICR
   (0x11h) will configure the pin as an active low interrupt output.
   
   So this need more configuration options to deconflict the setting.
   


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