xiaoxiang781216 commented on a change in pull request #2042:
URL: https://github.com/apache/incubator-nuttx/pull/2042#discussion_r508272235
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File path: arch/arm/src/cxd56xx/cxd56_irq.c
##########
@@ -115,17 +112,17 @@ static uint64_t g_intstack_alloc[INTSTACK_ALLOC >> 3];
const uint32_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] =
{
- (uint32_t)g_intstack_alloc + INTSTACK_SIZE,
+ (uint32_t)g_intstack_alloc + INTSTACK_SIZE - 8,
Review comment:
Is -8 really right? AAPCS require the full descending stack:
https://developer.arm.com/documentation/dui0204/j/writing-arm-assembly-language/load-and-store-multiple-register-instructions/implementing-stacks-with-ldm-and-stm
If My understand is correct, all -8/-4 should be removed instead. Other arch
has the similar problem too.
##########
File path: arch/arm/src/cxd56xx/cxd56_irq.c
##########
@@ -115,17 +112,17 @@ static uint64_t g_intstack_alloc[INTSTACK_ALLOC >> 3];
const uint32_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] =
{
- (uint32_t)g_intstack_alloc + INTSTACK_SIZE,
+ (uint32_t)g_intstack_alloc + INTSTACK_SIZE - 8,
Review comment:
Is -8 really right? AAPCS require the full descending stack:
https://developer.arm.com/documentation/dui0204/j/writing-arm-assembly-language/load-and-store-multiple-register-instructions/implementing-stacks-with-ldm-and-stm
If My understand is correct, all -8/-4 should be removed instead. Other
arch(e.g. RISC-V) has the similar problem too.
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