patacongo commented on a change in pull request #1728: URL: https://github.com/apache/incubator-nuttx/pull/1728#discussion_r489475071
########## File path: boards/arm/sama5/giant-board/include/board.h ########## @@ -0,0 +1,195 @@ +/**************************************************************************** + * boards/arm/sama5/giant-board/include/board.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_H +#define __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#ifndef __ASSEMBLY__ +# include <stdbool.h> +# include <nuttx/irq.h> +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. + * These definitions will configure operational clocking. + */ + +/* On-board crystal frequencies */ + +#define BOARD_MAINOSC_FREQUENCY (24000000) /* MAINOSC: 12MHz crystal on-board */ +#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */ + +#if defined(CONFIG_SAMA5_BOOT_SDRAM) +/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate + * bootloader. + * That bootloader had to have already configured the PLL and SDRAM for + * proper operation. + * + * In this case, we do not reconfigure the clocking. + * Rather, we need to query the register settings to determine the clock + * frequencies. + * We can only assume that the Main clock source is the on-board 24MHz + * crystal. + */ + +# include <arch/board/board_sdram.h> + +#elif defined(CONFIG_GIANT_BOARD_492MHZ) + +/* This configuration results in a CPU clock of 492MHz. + * + * In this configuration, UPLL is the source of the UHPHS clock (if enabled). + */ + +# include <arch/board/board_492mhz.h> + +#endif + +/* LED definitions **********************************************************/ + +/* There is a status LED on board the Giant Board. + * + * ------------------------------ ------------------- --------------------- + * SAMA5D27 PIO SIGNAL USAGE + * ------------------------------ ------------------- --------------------- + * PA6 STATUS_LED Orange LED + * ------------------------------ ------------------- --------------------- + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_ORANGE 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_ORANGE_BIT (1 << BOARD_ORANGE) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows. Note that only the GREEN LED is used in this case + * + * SYMBOL Val Meaning Green LED + * ----------------- --- ----------------------- ----------- + */ + +#define LED_STARTED 0 /* NuttX has been started OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON */ +#define LED_INIRQ 2 /* In an interrupt N/C */ +#define LED_SIGNAL 2 /* In a signal handler N/C */ +#define LED_ASSERTION 2 /* An assertion failed N/C */ +#define LED_PANIC 3 /* The system has crashed Flash */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Thus if the Orange LED is statically on, NuttX has successfully booted + * and is, apparently, running normally. + * If LED is flashing at approximately 2Hz, then a fatal error has been + * detected and the system has halted. + */ + +/* Pin disambiguation *******************************************************/ + +/* Alternative pin selections are provided with a numeric suffix like _1, _2, + * etc. Drivers, however, will use the pin selection without the numeric + * suffix. + * Additional definitions are required in this board.h file. + * For example, if we wanted the PCK0on PB26, then the following definition + * should appear in the board.h header file for that board: + * + * #define PIO_PMC_PCK0 PIO_PMC_PCK0_1 + * + * The PCK logic will then automatically configure PB26 as the PCK0 pin. + */ + +/* UART1. There is a TTL serial connection available on + * pins RX and TX. This is be driven by UART1. + * + * ---- ------------------------ ------------- + * J1/2 SCHEMATIC SAMA5D2 + * PIN NAME(s) PIO FUNCTION + * ---- ------------------------ ------------- + * 14 UART1_RX PD3 UTXD1 + * 15 UART1_TX PD2 URXD1 + * ---- ------------------------ ------------- + */ + +#define PIO_UART1_RXD PIO_UART1_RXD_1 +#define PIO_UART1_TXD PIO_UART1_TXD_1 + +/* FLEXCOM4 is available as a UART. + * + * ----- ------- ------------- + * J1/2 BOARD SAMA5D2 + * PIN NAME PIO FUNCTION + * ----- ------- ------------- + * 6 AD2 PD21 FLEXCOM4 + * 9 AD3 PD22 FLEXCOM4 + * ----- ------- ------------- + */ + +#define PIO_FLEXCOM4_IO0 PIO_FLEXCOM4_IO0_2 +#define PIO_FLEXCOM4_IO1 PIO_FLEXCOM4_IO1_2 + +/* PIO pins */ + +#define PIO_TX IO_ + +/* SDIO - Used for both Port 0 & 1 ******************************************/ + +/* 386 KHz for initial inquiry stuff */ + +#define BOARD_SDMMC_IDMODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV256 +#define BOARD_SDMMC_IDMODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(2) + +/* 24.8MHz for other modes */ + +#define BOARD_SDMMC_MMCMODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8 +#define BOARD_SDMMC_MMCMODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1) + +#define BOARD_SDMMC_SD1MODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8 +#define BOARD_SDMMC_SD1MODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1) + +#define BOARD_SDMMC_SD4MODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8 +#define BOARD_SDMMC_SD4MODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1) + Review comment: SDIO is STM32 terminology for HSMCI/SDMMC. These should be removed since SDMMC is not supported by the Giant Board. ########## File path: boards/arm/sama5/giant-board/src/giant-board.h ########## @@ -0,0 +1,436 @@ +/**************************************************************************** + * boards/arm/sama5/giant-board/src/giant-board.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_SAMA5_GIANT_BOARD_SRC_GIANT_BOARD_H +#define __BOARDS_ARM_SAMA5_GIANT_BOARD_SRC_GIANT_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/compiler.h> + +#include <stdint.h> +#include <stdbool.h> + +#include <arch/irq.h> +#include <nuttx/irq.h> + +#include "hardware/sam_pinmap.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#define HAVE_SDMMC 1 +#define HAVE_USBHOST 1 +#define HAVE_USBDEV 1 +#define HAVE_USBMONITOR 1 +#define HAVE_NETWORK 1 + +/* SDMMC */ + +/* Can't support MMC/SD if the card interface(s) are not enable */ + +#if !defined(CONFIG_SAMA5_SDMMC) && !defined(CONFIG_SAMA5_SDMMC0) +# undef HAVE_SDMMC +#endif + +/* Can't support MMC/SD features if mountpoints are disabled */ + +#if defined(HAVE_SDMMC) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No MMC/SD support +# undef HAVE_SDMCC +#endif + +/* We need PIO interrupts on PIOD to support card detect interrupts */ + +#if defined(HAVE_SDMMC) && !defined(CONFIG_SAMA5_PIOA_IRQ) +# warning PIOA interrupts not enabled. No MMC/SD support. +# undef HAVE_SDMMC +#endif + +/* MMC/SD minor numbers: The NSH device minor extended is extended to + * support two devices. If CONFIG_NSH_MMCSDMINOR is zero, these will be: + * /dev/mmcsd0 and /dev/mmcsd1. + */ + +#ifndef CONFIG_NSH_MMCSDMINOR +# define CONFIG_NSH_MMCSDMINOR 0 +#endif + +#ifdef HAVE_SDMMC + +# if ( defined(CONFIG_SAMA5_SDMMC0) && defined(CONFIG_SAMA5_SDMMC1) ) +# define SDMMC0_SLOTNO 0 +# define SDMMC1_SLOTNO 1 +# else +# if ( defined(CONFIG_SAMA5_SDMMC0) ) +# define SDMMC0_SLOTNO 0 +# endif +# if ( defined(CONFIG_SAMA5_SDMMC1) ) +# define SDMMC1_SLOTNO 0 +# endif +# endif + +# ifdef CONFIG_SAMA5_SDMMC0 +# define SDMMC0_MINOR CONFIG_NSH_MMCSDMINOR +# define SDMMC1_MINOR (CONFIG_NSH_MMCSDMINOR+1) +# else +# define SDMMC1_MINOR CONFIG_NSH_MMCSDMINOR +# endif +#else +#endif + +/* USB Host / USB Device */ + +/* Either CONFIG_SAMA5_UHPHS or CONFIG_SAMA5_UDPHS must be defined, + * or there is no USB of any kind. + */ + +#if !defined(CONFIG_SAMA5_UHPHS) +# undef CONFIG_SAMA5_OHCI +# undef CONFIG_SAMA5_EHCI +#endif + +#if !defined(CONFIG_SAMA5_UDPHS) +# undef HAVE_USBDEV +#endif + +/* CONFIG_USBDEV and CONFIG_USBHOST must also be defined */ + +#if !defined(CONFIG_USBDEV) +# undef HAVE_USBDEV +#endif + +#if defined(CONFIG_USBHOST) +# if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI) +# warning CONFIG_USBHOST is defined, but neither CONFIG_SAMA5_OHCI nor CONFIG_SAMA5_EHCI are defined +# endif +#else +# undef CONFIG_SAMA5_OHCI +# undef CONFIG_SAMA5_EHCI +#endif + +#if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI) +# undef HAVE_USBHOST +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#ifndef CONFIG_USBMONITOR +# undef HAVE_USBMONITOR +#endif + +#ifndef HAVE_USBDEV +# undef CONFIG_USBDEV_TRACE +#endif + +#ifndef HAVE_USBHOST +# undef CONFIG_USBHOST_TRACE +#endif + +#if !defined(CONFIG_USBDEV_TRACE) && !defined(CONFIG_USBHOST_TRACE) +# undef HAVE_USBMONITOR +#endif + +/* Networking */ + +#if !defined(CONFIG_NET) +# undef HAVE_NETWORK +#endif + +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define SAMA5_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define SAMA5_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/* Giant Board pinout + * + * Orientation is on pinout diagram, USB connector up. + * https://groboards.com/giant-board/ + * + * The Giant Board doesn't have pin numbers, instead the pins are labeled + * with the first function in this list. (AD4, AD2, etc.) + * + * J1 - left pins + * + * Reset + * 3.3V + * VREF + * GND + * AD4 / PD23 + * AD2 / PD21 + * AD1 / PD20 + * AD5 / PD24 + * AD3 / PD22 + * AD0 / PD19 + * SCK / PA14 + * MOSI / PA15 + * MISO / PA16 + * RX / PD2 + * TX / PD3 + * GND + * + * J2 - right pins + * + * VBAT + * EN + * VBUS + * PD13 + * PD31 + * PWM1 / PB0 + * PWM3 / PB7 + * PWML1 / PB1 + * PWM2 / PB5 + * PB3 / PWMEXTRG + * SCL / PC0 + * SDA / PB31 + * + */ + +/* J1 - left pins */ + +#define GB_PIO_AD4 PIO_ADC_AD4 /* AD4 / PD23 */ +#define GB_PIO_PD23 PIO_ADC_AD4 /* AD4 / PD23 */ + +#define GB_PIO_AD2 PIO_ADC_AD2 /* AD2 / PD21 */ +#define GB_PIO_PD21 PIO_ADC_AD2 /* AD2 / PD21 */ + +#define GB_PIO_AD1 PIO_ADC_AD1 /* AD1 / PD20 */ +#define GB_PIO_PD20 PIO_ADC_AD1 /* AD1 / PD20 */ + +#define GB_PIO_AD5 PIO_ADC_AD5 /* AD5 / PD24 */ +#define GB_PIO_PD24 PIO_ADC_AD5 /* AD5 / PD24 */ + +#define GB_PIO_AD3 PIO_ADC_AD3 /* AD3 / PD22 */ +#define GB_PIO_PD22 PIO_ADC_AD3 /* AD3 / PD22 */ + +#define GB_PIO_AD0 PIO_ADC_AD0 /* AD0 / PD19 */ +#define GB_PIO_PD19 PIO_ADC_AD0 /* AD0 / PD19 */ + +#define GB_PIO_SCK PIO_SPI0_SPCK_1 /* SCK / PA14 */ +#define GB_PIO_PA14 PIO_SPI0_SPCK_1 /* SCK / PA14 */ + +#define GB_PIO_MOSI PIO_SPI0_MOSI_1 /* MOSI / PA15 */ +#define GB_PIO_PA15 PIO_SPI0_MOSI_1 /* MOSI / PA15 */ + +#define GB_PIO_MISO PIO_SPI0_MISO_1 /* MISO / PA16 */ +#define GB_PIO_PA16 PIO_SPI0_MISO_1 /* MISO / PA16 */ + +#define GB_PIO_RX PIO_UART0_TXD /* RX / PD2 */ +#define GB_PIO_PD2 PIO_UART0_TXD /* RX / PD2 */ + +#define GB_PIO_TX PIO_UART0_RXD /* TX / PD3 */ +#define GB_PIO_PD3 PIO_UART0_RXD /* TX / PD3 */ + +/* J2 - right pins */ + +#define GB_PIO_PD13 PIO_TC1_CLK_2 /* PD13 */ + +#define GB_PIO_PD31 PIO_TC3_CLK_3 /* PD31 */ + +#define GB_PIO_PWM1 PIO_PWM0_H1 /* PWM1 / PB0 */ +#define GB_PIO_PB0 PIO_PWM0_H1 /* PWM1 / PB0 */ + +#define GB_PIO_PWM3 PIO_PWM0_H3 /* PWM3 / PB7 */ +#define GB_PIO_PB7 PIO_PWM0_H3 /* PWM3 / PB7 */ + +#define GB_PIO_PWML1 PIO_PWM0_L1 /* PWML1 / PB1 */ +#define GB_PIO_PB1 PIO_PWM0_L1 /* PWML1 / PB1 */ + +#define GB_PIO_PWM2 PIO_PWM0_H2 /* PWM2 / PB5 */ +#define GB_PIO_PB5 PIO_PWM0_H2 /* PWM2 / PB5 */ + +#define GB_PIO_PB3 PIO_PWM0_EXTRG0 /* PB3 / PWMEXTRG */ +#define GB_PIO_PWMEXTRG PIO_PWM0_EXTRG0 /* PB3 / PWMEXTRG */ + +#define GB_PIO_SCL PIO_TWI0_CK_2 /* SCL / PC0 */ +#define GB_PIO_PC0 PIO_TWI0_CK_2 /* SCL / PC0 */ + +#define GB_PIO_SDA PIO_TWI0_D_2 /* SDA / PB31 */ +#define GB_PIO_PB31 PIO_TWI0_D_2 /* SDA / PB31 */ + +/* LEDs *********************************************************************/ + +/* There is an orange status LED on board the Giant Board + * driven by pin (PA6). + * + * ------------------------------ ------------------- --------------------- + * SAMA5D2 PIO SIGNAL USAGE + * ------------------------------ ------------------- --------------------- + * PA6 STATUS_LED Orange LED + * ------------------------------ ------------------- --------------------- + */ + +#define PIO_LED_ORANGE (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_SET | \ + PIO_PORT_PIOA | PIO_PIN6) + +/* SDMMC clocking + * + * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV+1)). + * + * MCI_SPEED = MCK / (2*(CLKDIV+1)) + * CLKDIV = MCI / MCI_SPEED / 2 - 1 + * + * Where CLKDIV has a range of 0-255. + */ + +/* MCK = 96MHz, CLKDIV = 119, MCI_SPEED = 96MHz / 2 * (119+1) = 400 KHz */ + +#define SDMMC_INIT_CLKDIV (119 << SDMMC_MR_CLKDIV_SHIFT) + +/* MCK = 96MHz, CLKDIV = 3, MCI_SPEED = 96MHz / 2 * (3+1) = 12 MHz */ + +#define SDMMC_MMCXFR_CLKDIV (3 << SDMMC_MR_CLKDIV_SHIFT) + +/* MCK = 96MHz, CLKDIV = 1, MCI_SPEED = 96MHz / 2 * (1+1) = 24 MHz */ + +#define SDMMC_SDXFR_CLKDIV (1 << SDMMC_MR_CLKDIV_SHIFT) +#define SDMMC_SDWIDEXFR_CLKDIV SDMMC_SDXFR_CLKDIV + Review comment: Remove the above. The Giant Board does support the SDMMC interface. ########## File path: boards/arm/sama5/giant-board/src/sam_sdmmc.c ########## @@ -0,0 +1,319 @@ +/**************************************************************************** + * boards/arm/sama5/giant-board/src/sam_sdmmc.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* The Giant Board provide one Micro SD memory card slot at J6 (SDMMC1). + * + * SDMMC1: The Micro SD card slot connects via SDMMC1. The card detect + * discrete is available on PA21 (pulled high), shared with DAT3. The write + * protect discrete is tied to ground and not available to software. The + * slot only supports 4-bit wide transfer mode. + * + * PA18 SDMMC1_DAT0 + * PA19 SDMMC1_DAT1 + * PA20 SDMMC1_DAT2 + * PA21 SDMMC1_DAT3 / CD + * PD22 SDMMC1_CK + * PA28 SDMMC1_CMD + * + */ + Review comment: I believe that all of the comments above are incorrect. ########## File path: boards/arm/sama5/giant-board/src/sam_sdmmc.c ########## @@ -0,0 +1,319 @@ +/**************************************************************************** + * boards/arm/sama5/giant-board/src/sam_sdmmc.c + * Review comment: This entire file must be removed. The Giant Board does not support the SDMMC (HSMCI) interface. The interface to the SD card has to be via SPI. ---------------------------------------------------------------- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. For queries about this service, please contact Infrastructure at: us...@infra.apache.org
