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The following commit(s) were added to refs/heads/master by this push:
new b628aec268f arch/arm/rp23xx: spi unset peripheral before to modify
Spi parameters
b628aec268f is described below
commit b628aec268f61797242964bd41ef22d7f006b1d1
Author: paolo <paolo.vo...@gmail.com>
AuthorDate: Fri Jul 11 10:34:53 2025 +0200
arch/arm/rp23xx: spi unset peripheral before to modify Spi parameters
As done by Pico Sdk is better to unset SSPCR1.SSE bit before to modify
Spi parameters (Mode, Frequency as Bits)
---
arch/arm/src/rp23xx/rp23xx_spi.c | 71 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 71 insertions(+)
diff --git a/arch/arm/src/rp23xx/rp23xx_spi.c b/arch/arm/src/rp23xx/rp23xx_spi.c
index f1c78de9586..14f89775d36 100644
--- a/arch/arm/src/rp23xx/rp23xx_spi.c
+++ b/arch/arm/src/rp23xx/rp23xx_spi.c
@@ -127,6 +127,8 @@ static void spi_dmarecvblock(struct spi_dev_s *dev,
/* SPI methods */
static int spi_lock(struct spi_dev_s *dev, bool lock);
+static void spi_enable_ssp(struct spi_dev_s *dev);
+static void spi_disable_ssp(struct spi_dev_s *dev);
static uint32_t spi_setfrequency(struct spi_dev_s *dev,
uint32_t frequency);
static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode);
@@ -136,6 +138,7 @@ static void unused_code spi_exchange(struct spi_dev_s *dev,
const void *txbuffer,
void *rxbuffer,
size_t nwords);
+
#ifndef CONFIG_SPI_EXCHANGE
static void spi_sndblock(struct spi_dev_s *dev, const void *buffer,
size_t nwords);
@@ -340,6 +343,50 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
}
}
+/****************************************************************************
+ * Name: spi_enable_ssp
+ *
+ * Description:
+ * Enable Spi PrimeCell SSP peripheral.
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+static void spi_enable_ssp(struct spi_dev_s *dev)
+{
+ struct rp23xx_spidev_s *priv = (struct rp23xx_spidev_s *)dev;
+ uint32_t regval = spi_getreg(priv, RP23XX_SPI_SSPCR1_OFFSET);
+ regval |= RP23XX_SPI_SSPCR1_SSE;
+ spi_putreg(priv, RP23XX_SPI_SSPCR1_OFFSET, regval);
+}
+
+/****************************************************************************
+ * Name: spi_disable_ssp
+ *
+ * Description:
+ * Disable Spi PrimeCell SSP peripheral.
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+static void spi_disable_ssp(struct spi_dev_s *dev)
+{
+ struct rp23xx_spidev_s *priv = (struct rp23xx_spidev_s *)dev;
+ uint32_t regval = spi_getreg(priv, RP23XX_SPI_SSPCR1_OFFSET);
+ regval &= ~RP23XX_SPI_SSPCR1_SSE;
+ spi_putreg(priv, RP23XX_SPI_SSPCR1_OFFSET, regval);
+}
+
/****************************************************************************
* Name: spi_setfrequency
*
@@ -382,6 +429,10 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev,
divisor = (divisor + 1) & ~1;
+ /* Disable Spi PrimeCell SSP peripheral */
+
+ spi_disable_ssp(dev);
+
/* Save the new divisor value */
spi_putreg(priv, RP23XX_SPI_SSPCPSR_OFFSET, divisor);
@@ -395,6 +446,10 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev,
priv->frequency = frequency;
priv->actual = actual;
+ /* Enable Spi PrimeCell SSP peripheral */
+
+ spi_enable_ssp(dev);
+
spiinfo("Frequency %" PRId32 "->%" PRId32 "\n", frequency, actual);
return actual;
}
@@ -425,6 +480,10 @@ static void spi_setmode(struct spi_dev_s *dev, enum
spi_mode_e mode)
{
/* Yes... Set CR0 appropriately */
+ /* Disable Spi PrimeCell SSP peripheral */
+
+ spi_disable_ssp(dev);
+
regval = spi_getreg(priv, RP23XX_SPI_SSPCR0_OFFSET);
regval &= ~(RP23XX_SPI_SSPCR0_SPO | RP23XX_SPI_SSPCR0_SPH);
@@ -454,6 +513,10 @@ static void spi_setmode(struct spi_dev_s *dev, enum
spi_mode_e mode)
spi_putreg(priv, RP23XX_SPI_SSPCR0_OFFSET, regval);
+ /* Enable Spi PrimeCell SSP peripheral */
+
+ spi_enable_ssp(dev);
+
/* Save the mode so that subsequent re-configurations will be faster */
priv->mode = mode;
@@ -488,11 +551,19 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
{
/* Yes... Set CR0 appropriately */
+ /* Disable Spi PrimeCell SSP peripheral */
+
+ spi_disable_ssp(dev);
+
regval = spi_getreg(priv, RP23XX_SPI_SSPCR0_OFFSET);
regval &= ~RP23XX_SPI_SSPCR0_DSS_MASK;
regval |= ((nbits - 1) << RP23XX_SPI_SSPCR0_DSS_SHIFT);
spi_putreg(priv, RP23XX_SPI_SSPCR0_OFFSET, regval);
+ /* Enable Spi PrimeCell SSP peripheral */
+
+ spi_enable_ssp(dev);
+
/* Save the selection so that re-configurations will be faster
*/
