hartmannathan commented on code in PR #15720:
URL: https://github.com/apache/nuttx/pull/15720#discussion_r1934531268
##########
arch/arm64/src/zynq-mpsoc/Kconfig:
##########
@@ -35,6 +35,136 @@ config ZYNQ_MPSOC_UART1
---help---
Select to enable support for UART1.
+config ZYNQ_ENET
+ bool "Ethernet"
+ default n
+ select ARCH_HAVE_PHY
+ select ARCH_HAVE_NETDEV_STATISTICS
+
endmenu # XILINX ZYNQ_MPSOC Peripheral Selection
+menu "Ethernet Configuration"
+ depends on ZYNQ_ENET
+
+choice
+ prompt "ZYNQ Ethernet Interface"
+ default ZYNQ_ENET4
+ depends on ZYNQ_ENET
+
+config ZYNQ_ENET1
+ bool "ENET 1"
+
+config ZYNQ_ENET2
+ bool "ENET 2"
+
+config ZYNQ_ENET3
+ bool "ENET 3"
+
+config ZYNQ_ENET4
+ bool "ENET 4"
+
+endchoice # ZYNQ Ethernet Interface
+
+config ZYNQ_GMAC_NRXBUFFERS
+ int "Number of RX buffers"
+ default 16
+ ---help---
+ GMAC buffer memory is segmented into 128 byte units (not
+ configurable). This setting provides the number of such 128
byte
+ units used for reception. This is also equal to the number of
RX
+ descriptors that will be allocated The selected value must be
an
Review Comment:
```suggestion
descriptors that will be allocated. The selected value must be
an
```
##########
arch/arm64/src/zynq-mpsoc/Kconfig:
##########
@@ -35,6 +35,136 @@ config ZYNQ_MPSOC_UART1
---help---
Select to enable support for UART1.
+config ZYNQ_ENET
+ bool "Ethernet"
+ default n
+ select ARCH_HAVE_PHY
+ select ARCH_HAVE_NETDEV_STATISTICS
+
endmenu # XILINX ZYNQ_MPSOC Peripheral Selection
+menu "Ethernet Configuration"
+ depends on ZYNQ_ENET
+
+choice
+ prompt "ZYNQ Ethernet Interface"
+ default ZYNQ_ENET4
+ depends on ZYNQ_ENET
+
+config ZYNQ_ENET1
+ bool "ENET 1"
+
+config ZYNQ_ENET2
+ bool "ENET 2"
+
+config ZYNQ_ENET3
+ bool "ENET 3"
+
+config ZYNQ_ENET4
+ bool "ENET 4"
+
+endchoice # ZYNQ Ethernet Interface
+
+config ZYNQ_GMAC_NRXBUFFERS
+ int "Number of RX buffers"
+ default 16
+ ---help---
+ GMAC buffer memory is segmented into 128 byte units (not
+ configurable). This setting provides the number of such 128
byte
+ units used for reception. This is also equal to the number of
RX
+ descriptors that will be allocated The selected value must be
an
+ even power of 2.
+
+config ZYNQ_GMAC_NTXBUFFERS
+ int "Number of TX buffers"
+ default 8
+ ---help---
+ GMAC buffer memory is segmented into full Ethernet packets (size
+ NET_BUFSIZE bytes). This setting provides the number of such
packets
+ that can be in flight. This is also equal to the number of TX
+ descriptors that will be allocated.
+
+config ZYNQ_GMAC_PREALLOCATE
+ bool "Preallocate buffers"
+ default n
+ ---help---
+ Buffer an descriptor many may either be allocated from the
memory
+ pool or pre-allocated to lie in .bss. This options selected
pre-
Review Comment:
```suggestion
pool or pre-allocated to lie in .bss. This option selects pre-
```
##########
arch/arm64/src/zynq-mpsoc/Kconfig:
##########
@@ -35,6 +35,136 @@ config ZYNQ_MPSOC_UART1
---help---
Select to enable support for UART1.
+config ZYNQ_ENET
+ bool "Ethernet"
+ default n
+ select ARCH_HAVE_PHY
+ select ARCH_HAVE_NETDEV_STATISTICS
+
endmenu # XILINX ZYNQ_MPSOC Peripheral Selection
+menu "Ethernet Configuration"
+ depends on ZYNQ_ENET
+
+choice
+ prompt "ZYNQ Ethernet Interface"
+ default ZYNQ_ENET4
+ depends on ZYNQ_ENET
+
+config ZYNQ_ENET1
+ bool "ENET 1"
+
+config ZYNQ_ENET2
+ bool "ENET 2"
+
+config ZYNQ_ENET3
+ bool "ENET 3"
+
+config ZYNQ_ENET4
+ bool "ENET 4"
+
+endchoice # ZYNQ Ethernet Interface
+
+config ZYNQ_GMAC_NRXBUFFERS
+ int "Number of RX buffers"
+ default 16
+ ---help---
+ GMAC buffer memory is segmented into 128 byte units (not
+ configurable). This setting provides the number of such 128
byte
+ units used for reception. This is also equal to the number of
RX
+ descriptors that will be allocated The selected value must be
an
+ even power of 2.
+
+config ZYNQ_GMAC_NTXBUFFERS
+ int "Number of TX buffers"
+ default 8
+ ---help---
+ GMAC buffer memory is segmented into full Ethernet packets (size
+ NET_BUFSIZE bytes). This setting provides the number of such
packets
+ that can be in flight. This is also equal to the number of TX
+ descriptors that will be allocated.
+
+config ZYNQ_GMAC_PREALLOCATE
+ bool "Preallocate buffers"
+ default n
+ ---help---
+ Buffer an descriptor many may either be allocated from the
memory
Review Comment:
```suggestion
Buffer and descriptor may either be allocated from the memory
```
##########
arch/arm64/src/zynq-mpsoc/Kconfig:
##########
@@ -35,6 +35,136 @@ config ZYNQ_MPSOC_UART1
---help---
Select to enable support for UART1.
+config ZYNQ_ENET
+ bool "Ethernet"
+ default n
+ select ARCH_HAVE_PHY
+ select ARCH_HAVE_NETDEV_STATISTICS
+
endmenu # XILINX ZYNQ_MPSOC Peripheral Selection
+menu "Ethernet Configuration"
+ depends on ZYNQ_ENET
+
+choice
+ prompt "ZYNQ Ethernet Interface"
+ default ZYNQ_ENET4
+ depends on ZYNQ_ENET
+
+config ZYNQ_ENET1
+ bool "ENET 1"
+
+config ZYNQ_ENET2
+ bool "ENET 2"
+
+config ZYNQ_ENET3
+ bool "ENET 3"
+
+config ZYNQ_ENET4
+ bool "ENET 4"
+
+endchoice # ZYNQ Ethernet Interface
+
+config ZYNQ_GMAC_NRXBUFFERS
+ int "Number of RX buffers"
+ default 16
+ ---help---
+ GMAC buffer memory is segmented into 128 byte units (not
+ configurable). This setting provides the number of such 128
byte
+ units used for reception. This is also equal to the number of
RX
+ descriptors that will be allocated The selected value must be
an
+ even power of 2.
+
+config ZYNQ_GMAC_NTXBUFFERS
+ int "Number of TX buffers"
+ default 8
+ ---help---
+ GMAC buffer memory is segmented into full Ethernet packets (size
+ NET_BUFSIZE bytes). This setting provides the number of such
packets
+ that can be in flight. This is also equal to the number of TX
+ descriptors that will be allocated.
+
+config ZYNQ_GMAC_PREALLOCATE
+ bool "Preallocate buffers"
+ default n
+ ---help---
+ Buffer an descriptor many may either be allocated from the
memory
+ pool or pre-allocated to lie in .bss. This options selected
pre-
+ allocated buffer memory.
+
+config ZYNQ_GMAC_NBC
+ bool "Disable Broadcast"
+ default n
+ ---help---
+ Select to disable receipt of broadcast packets.
Review Comment:
Does this disable receipt or transmit of broadcast packets? I think the
title should make it clear, so instead of "Disable Broadcast" maybe "Disable
Receiving Broadcasts"?
##########
arch/arm64/src/zynq-mpsoc/zynq_enet.h:
##########
@@ -0,0 +1,235 @@
+/****************************************************************************
+ * arch/arm64/src/zynq-mpsoc/zynq_enet.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM64_SRC_ZYNQ_MPSOC_ZYNQ_ENET_H
+#define __ARCH_ARM64_SRC_ZYNQ_MPSOC_ZYNQ_ENET_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/wqueue.h>
+#include <nuttx/net/gmii.h>
+#include <nuttx/net/ip.h>
+#include <nuttx/net/netdev.h>
+#include <nuttx/net/phy.h>
+
+#include "hardware/zynq_gmac.h"
+
+#ifdef CONFIG_ZYNQ_ENET
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Definitions for use with zynq_phy_boardinitialize */
+
+#define EMAC_INTF 0
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+enum phy_interface_s
+{
+ PHY_INTERFACE_MODE_MII,
+ PHY_INTERFACE_MODE_GMII,
+ PHY_INTERFACE_MODE_SGMII,
+ PHY_INTERFACE_MODE_QSGMII,
+ PHY_INTERFACE_MODE_TBI,
+ PHY_INTERFACE_MODE_RMII,
+ PHY_INTERFACE_MODE_RGMII,
+ PHY_INTERFACE_MODE_RGMII_ID,
+ PHY_INTERFACE_MODE_RGMII_RXID,
+ PHY_INTERFACE_MODE_RGMII_TXID,
+ PHY_INTERFACE_MODE_RTBI,
+ PHY_INTERFACE_MODE_XGMII,
+ PHY_INTERFACE_MODE_UNKNOWN,
+ PHY_INTERFACE_MODE_NONE /* Must be last */
+};
+
+struct zynq_gmac_s;
+
+/* The zynq_phy_s encapsulates all state information for phy chip */
+
+struct phy_s
+{
+ uint32_t uid; /* PHY id (set by boardinitialize) */
+ void *priv; /* PHY private Interface */
+
+ /* Called to configure the PHY, and modify the controller
+ * based on the results. Should be called after phy_connect
+ */
+
+ int (*config)(struct zynq_gmac_s *gmac);
+ enum phy_interface_s interface; /* PHY interface type */
+ uint8_t phyaddr; /* PHY address (pre-defined by pins on
reset) */
+};
+
+/* The zynq_gmac_s encapsulates all state information for GMAC peripheral */
+
+struct zynq_gmac_s
+{
+ /* This holds the information visible to the NuttX network */
+
+ struct net_driver_s dev; /* Interface understood by the network */
+
+ const uint32_t base; /* Base address of ENET controller */
+ uint8_t num; /* gmac 0 1 2 3 */
+ bool ifup; /* true:ifup false:ifdown */
+ const int irq; /* Enet interrupt */
+ struct wdog_s txtimeout; /* TX timeout timer */
+ struct work_s irqwork; /* For deferring interrupt work to the
work queue */
+ struct work_s pollwork; /* For deferring poll work to the work
queue */
+
+ struct phy_s phy; /* Used to holds phy information */
+
+ /* Used to track transmit and receive descriptors */
+
+ uint16_t txhead; /* Circular buffer head index */
+ uint16_t txtail; /* Circualr buffer tail index */
+ uint16_t rxndx; /* RX index for current processing RX
descriptor */
+
+ uint8_t *rxbuffer; /* Allocated RX buffers */
+ uint8_t *txbuffer; /* Allocated TX buffers */
+ struct gmac_rxdesc_s *rxdesc; /* Allocated RX descriptors */
+ struct gmac_txdesc_s *txdesc; /* Allocated TX descriptors */
+
+ /* Debug stuff */
+
+#ifdef CONFIG_ZYNQ_GMAC_REGDEBUG
+ bool wrlast; /* Last was a write */
+ uintptr_t addrlast; /* Last address */
+ uint32_t vallast; /* Last value */
+ int ntimes; /* Number of times */
+#endif
+};
+
+/****************************************************************************
+ * Public Functions Prototypes
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Function: zynq_gmac_initialize
+ *
+ * Description:
+ * Initialize the Ethernet controller and driver
+ *
+ * Input Parameters:
+ * intf - In the case where there are multiple EMACs, this value identifies
+ * which EMAC is to be initialized.
+ *
+ * Returned Value:
+ * OK on success; Negated errno on failure.
+ *
+ * Assumptions:
+ *
+ ****************************************************************************/
+
+int zynq_gmac_initialize(int intf);
+
+/****************************************************************************
+ * Function: zynq_phy_boardinitialize
+ *
+ * Description:
+ * Some boards require specialized initialization of the PHY before it can
+ * be used. This may include such things as configuring GPIOs, resetting
+ * the PHY, etc. If CONFIG_ZYNQ_ENET_PHYINIT is defined in the
+ * configuration then the board specific logic must provide
+ * zynq_phyinitialize(); The i.MX RT Ethernet driver will call this
Review Comment:
```suggestion
* zynq_phyinitialize(); The ZYNQ ENET Ethernet driver will call this
```
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