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The following commit(s) were added to refs/heads/master by this push: new 8571893435 arm: sama5: sam_serial: fix to compile with "UART Flow control enabled" on SAMA5D2. 8571893435 is described below commit 857189343597cfac5c8bb287e0e7db49959ff643 Author: Takeyoshi Kikuchi <kiku...@centurysys.co.jp> AuthorDate: Fri Jan 26 09:17:33 2024 +0900 arm: sama5: sam_serial: fix to compile with "UART Flow control enabled" on SAMA5D2. SAMA5D2 has UART (TX/RX only) and FLEXCOM USART (with control pins). UART has only TX/RX, so if I try to use flow control with FLEXCOM USART, there is no register definition on the UART side and get a compilation error. Signed-off-by: Takeyoshi Kikuchi <kiku...@centurysys.co.jp> --- arch/arm/src/sama5/sam_serial.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/src/sama5/sam_serial.c b/arch/arm/src/sama5/sam_serial.c index 6d56c6dd31..45d74c6ee6 100644 --- a/arch/arm/src/sama5/sam_serial.c +++ b/arch/arm/src/sama5/sam_serial.c @@ -1019,6 +1019,7 @@ static int up_setup(struct uart_dev_s *dev) up_shutdown(dev); #if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL) +#if defined(ATSAMA5D3) || defined(ATSAMA5D4) /* Setting the USART to operate with hardware handshaking is performed by * writing the USART_MODE field in the Mode Register (US_MR) to the value * 0x2. ... Using this mode requires using the PDC or DMAC channel for @@ -1032,6 +1033,7 @@ static int up_setup(struct uart_dev_s *dev) regval = (UART_MR_MODE_HWHS | SAM_MR_USCLKS | UART_MR_CHMODE_NORMAL); } else +#endif #endif { #if defined(ATSAMA5D2)