Am Fr,22.08.2008 um 16:00 schrieb Graham Cox:
On 22 Aug 2008, at 11:54 pm, Negm-Awad Amin wrote:
This is not ugly, but the starting point for a software PLL.
Well, there's no "loop" to phase lock here.
This was the reason for me, to write: "starting point". Look to my
newer answer.
The PLL analogy might hold up if you used your timer to measure the
interval between changes of the clock, then use that to change the
timer rate (feedback). Then you could ensure that the timer callback
always occurred within a certain interval of the clock changing
(analogous to the phase delay in a PLL). But, it's pretty complex
for such a simple task, and not necessary. If the clock were running
much, much faster and you wanted to keep up with sub-millisecond
changes then yes, you might have a point...
cheers, Graham
Cheers,
Amin Negm-Awad
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