colemancda wrote: @rjmccall I am going to add commits to this branch that implement the following: 1. Integer args — kept the C convention's 8 registers (a0–a7); no change needed. 2. Returns — swiftcall now returns directly in up to 4 registers (a0–a3 / fa0–fa3) instead of 2, in CC_RISCV_Impl (RISCVCallingConv.cpp). Four matches clang's SwiftABIInfo::shouldPassIndirectly limit exactly, so frontend and backend agree; larger returns demote to sret as before. 3. FP registers — swiftcall follows the selected floating-point ABI: hard-float ABIs use fa0–fa7 for args / fa0–fa3 for returns; -mabi=lp64 is the explicit soft-float opt-out. 4. Context register — swiftself goes in x20 (s4), mirroring AArch64; already callee-saved, so preservation falls out of normal spilling. x21/x22 are informally reserved for future swifterror/swiftasync.
At this moment I would not yet implement lowering for swifterror/swiftasync. Would that be acceptable? https://github.com/llvm/llvm-project/pull/213448 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
