================
@@ -0,0 +1,311 @@
+// REQUIRES: aarch64-registered-target || arm-registered-target
+
+// RUN: %clang_cc1 -triple arm64-none-linux-gnu
-target-feature +neon -disable-O0-optnone -flax-vector-conversions=none
-emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s
--check-prefixes=ALL,LLVM
+// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu
-target-feature +neon -disable-O0-optnone -flax-vector-conversions=none
-fclangir -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s
--check-prefixes=ALL,LLVM %}
+// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu
-target-feature +neon -disable-O0-optnone -flax-vector-conversions=none
-fclangir -emit-cir -o - %s | FileCheck %s
--check-prefixes=ALL,CIR %}
+
+//=============================================================================
+// NOTES
+//
+// This file contains tests that were originally located in
+// * clang/test/CodeGen/AArch64/neon-vget.c
+// * clang/test/CodeGen/AArch64/poly64.c
+// The main difference is the use of RUN lines that enable ClangIR lowering;
+// therefore only builtins currently supported by ClangIR are tested here.
+//=============================================================================
+
+#include <arm_neon.h>
+
+//===------------------------------------------------------===//
+// Extract one element from vector
----------------
banach-space wrote:
[ultra nit] For full disambiguation:
```suggestion
// 2.1.9.7 Extract one element from vector
```
Also, from what I can tell, we are still missing `getq_lane_mf8`,
`vget_lane_mf8` and `vdup_*`, which seem to be misplaced in the spec.
```suggestion
// 2.1.9.7 Extract one element from vector
//
// Excluding FP8 variants (`getq_lane_mf8`, `vget_lane_mf8` ) and `vdup_*`,
which seem to be misplaced in the spec.
```
https://github.com/llvm/llvm-project/pull/186119
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