================ @@ -43,7 +43,7 @@ class MipsSubtarget : public MipsGenSubtargetInfo { Mips3, Mips4, Mips5, Mips64, Mips64r2, Mips64r3, Mips64r5, Mips64r6 }; - enum class CPU { P5600 }; + enum class CPU { P5600, I6400 }; ---------------- djtodoro wrote:
So, we do not use this in this patch at all, right? If that is the case, please leave this change for the Sched. Model PR. https://github.com/llvm/llvm-project/pull/130587 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits