================ @@ -43,7 +43,7 @@ class MipsSubtarget : public MipsGenSubtargetInfo { Mips3, Mips4, Mips5, Mips64, Mips64r2, Mips64r3, Mips64r5, Mips64r6 }; - enum class CPU { P5600 }; + enum class CPU { P5600, I6400 }; ---------------- mgoudar wrote:
Thanks for quick review! yes. i6500 is multi-cluster version of i6400 and both are based on MIPS64 Release 6 ISA. Hence I kept single subtarget I6400 and reused it in Mips.td for both i6400 and i6500. I have added comments in the changed file Mips.td and MipsSubTarget.h https://github.com/llvm/llvm-project/pull/130587 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits