================
@@ -405,6 +405,17 @@ class AArch64Subtarget final : public
AArch64GenSubtargetInfo {
return MinSVEVectorSizeInBits;
}
+ // Return the known bit length of SVE data registers. A value of 0 means the
+ // length is unkown beyond what's implied by the architecture.
+ unsigned getSVEVectorSizeInBits() const {
+ assert(isSVEorStreamingSVEAvailable() &&
+ "Tried to get SVE vector length without SVE support!");
+ if (MaxSVEVectorSizeInBits &&
+ MinSVEVectorSizeInBits == MaxSVEVectorSizeInBits)
----------------
paulwalker-arm wrote:
Not sure if this can happen outside of handwritten IR but otherwise it sounds
like a reasonable suggestion to me.
https://github.com/llvm/llvm-project/pull/129732
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