================
@@ -7380,17 +7380,31 @@ bool
AArch64DAGToDAGISel::SelectAddrModeIndexedSVE(SDNode *Root, SDValue N,
return false;
SDValue VScale = N.getOperand(1);
- if (VScale.getOpcode() != ISD::VSCALE)
+ std::optional<int64_t> MulImm;
+ if (VScale.getOpcode() == ISD::VSCALE) {
+ MulImm = cast<ConstantSDNode>(VScale.getOperand(0))->getSExtValue();
+ } else if (auto C = dyn_cast<ConstantSDNode>(VScale)) {
+ int64_t ByteOffset = C->getSExtValue();
+ constexpr auto SVEBitsPerBlock = AArch64::SVEBitsPerBlock;
+ auto MinVScale = Subtarget->getMinSVEVectorSizeInBits() / SVEBitsPerBlock;
+ auto MaxVScale = Subtarget->getMaxSVEVectorSizeInBits() / SVEBitsPerBlock;
+
+ if (!MaxVScale || MinVScale != MaxVScale || ByteOffset % MaxVScale != 0)
----------------
rj-jesus wrote:
Thanks - I've added this. Please let me know if that's what you had in mind. :)
https://github.com/llvm/llvm-project/pull/129732
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