https://github.com/chandlerc updated
https://github.com/llvm/llvm-project/pull/121043
>From 3314a7d9b2ab582769ce4b4438d24d31c280d9f8 Mon Sep 17 00:00:00 2001
From: Chandler Carruth <chandl...@gmail.com>
Date: Tue, 24 Dec 2024 08:41:49 +0000
Subject: [PATCH] Bulk port 64-bit x86 builtins to TableGen
This PR follows #120831 (the PR contains both, only review the last
commit here as the other commit will be reviewed on the other PR).
Similar to that PR, this does a very mechanical port of X86 builtins to
TableGen. There is a *lot* of improvement available here to use TableGen
more effectively and collapse repeated structures. But those can now be
follow-up PRs that restructure *within* the `.td` file.
The current structure produces a file that exactly matches the original
X-macros except for the differences outlined in #120831:
- Horizontal whitespace
- `long long` types now use `long long` outside of OpenCL, but switch to
`long` in OpenCL for the core `__builtin_ia32_...` builtins.
Otherwise, only the order of builtins change, and no tests regress.
---
clang/include/clang/Basic/BuiltinsX86.td | 18 +-
clang/include/clang/Basic/BuiltinsX86Base.td | 29 ++
clang/include/clang/Basic/BuiltinsX86_64.def | 253 ----------
clang/include/clang/Basic/BuiltinsX86_64.td | 485 +++++++++++++++++++
clang/include/clang/Basic/CMakeLists.txt | 4 +
clang/include/clang/Basic/TargetBuiltins.h | 2 +-
clang/lib/Basic/Targets/X86.cpp | 2 +-
7 files changed, 521 insertions(+), 272 deletions(-)
create mode 100644 clang/include/clang/Basic/BuiltinsX86Base.td
delete mode 100644 clang/include/clang/Basic/BuiltinsX86_64.def
create mode 100644 clang/include/clang/Basic/BuiltinsX86_64.td
diff --git a/clang/include/clang/Basic/BuiltinsX86.td
b/clang/include/clang/Basic/BuiltinsX86.td
index 73678bc868bfda..18fc10eb85c027 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -10,23 +10,7 @@
//
//===----------------------------------------------------------------------===//
-include "clang/Basic/BuiltinsBase.td"
-
-class X86Builtin<string prototype> : TargetBuiltin {
- let Spellings = ["__builtin_ia32_" # NAME];
- let Prototype = prototype;
- let EnableOpenCLLong = 1;
-}
-
-class X86NoPrefixBuiltin<string prototype> : TargetBuiltin {
- let Spellings = [NAME];
- let Prototype = prototype;
-}
-
-class X86LibBuiltin<string prototype> : TargetLibBuiltin {
- let Spellings = [NAME];
- let Prototype = prototype;
-}
+include "clang/Basic/BuiltinsX86Base.td"
def rdpmc : X86Builtin<"unsigned long long int(int)">;
def rdtsc : X86Builtin<"unsigned long long int()">;
diff --git a/clang/include/clang/Basic/BuiltinsX86Base.td
b/clang/include/clang/Basic/BuiltinsX86Base.td
new file mode 100644
index 00000000000000..aca39c204516ae
--- /dev/null
+++ b/clang/include/clang/Basic/BuiltinsX86Base.td
@@ -0,0 +1,29 @@
+//===--- BuiltinsX86Base.td - X86 Builtin function classes ------*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the X86-specific builtin function classes.
+//
+//===----------------------------------------------------------------------===//
+
+include "clang/Basic/BuiltinsBase.td"
+
+class X86Builtin<string prototype> : TargetBuiltin {
+ let Spellings = ["__builtin_ia32_" # NAME];
+ let Prototype = prototype;
+ let EnableOpenCLLong = 1;
+}
+
+class X86NoPrefixBuiltin<string prototype> : TargetBuiltin {
+ let Spellings = [NAME];
+ let Prototype = prototype;
+}
+
+class X86LibBuiltin<string prototype> : TargetLibBuiltin {
+ let Spellings = [NAME];
+ let Prototype = prototype;
+}
diff --git a/clang/include/clang/Basic/BuiltinsX86_64.def
b/clang/include/clang/Basic/BuiltinsX86_64.def
deleted file mode 100644
index 57928a14b3b399..00000000000000
--- a/clang/include/clang/Basic/BuiltinsX86_64.def
+++ /dev/null
@@ -1,253 +0,0 @@
-//===--- BuiltinsX86_64.def - X86-64 Builtin function database --*- C++
-*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines the X86-64-specific builtin function database. Users of
-// this file must define the BUILTIN macro to make use of this information.
-//
-//===----------------------------------------------------------------------===//
-
-// The format of this database matches clang/Basic/Builtins.def.
-
-#if defined(BUILTIN) && !defined(TARGET_BUILTIN)
-# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS)
-#endif
-
-#if defined(BUILTIN) && !defined(TARGET_HEADER_BUILTIN)
-# define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANG, FEATURE)
BUILTIN(ID, TYPE, ATTRS)
-#endif
-
-TARGET_HEADER_BUILTIN(_BitScanForward64, "UcUNi*ULLi", "nh", INTRIN_H,
ALL_MS_LANGUAGES, "")
-TARGET_HEADER_BUILTIN(_BitScanReverse64, "UcUNi*ULLi", "nh", INTRIN_H,
ALL_MS_LANGUAGES, "")
-
-TARGET_HEADER_BUILTIN(__mulh, "LLiLLiLLi", "nch", INTRIN_H,
ALL_MS_LANGUAGES, "")
-TARGET_HEADER_BUILTIN(__umulh, "ULLiULLiULLi", "nch", INTRIN_H,
ALL_MS_LANGUAGES, "")
-TARGET_HEADER_BUILTIN(_mul128, "LLiLLiLLiLLi*", "nch", INTRIN_H,
ALL_MS_LANGUAGES, "")
-TARGET_HEADER_BUILTIN(_umul128, "ULLiULLiULLiULLi*", "nch", INTRIN_H,
ALL_MS_LANGUAGES, "")
-
-TARGET_HEADER_BUILTIN(__faststorefence, "v", "nh", INTRIN_H, ALL_MS_LANGUAGES,
"")
-TARGET_HEADER_BUILTIN(__shiftleft128, "ULLiULLiULLiUc", "nch", INTRIN_H,
ALL_MS_LANGUAGES, "")
-TARGET_HEADER_BUILTIN(__shiftright128, "ULLiULLiULLiUc", "nch", INTRIN_H,
ALL_MS_LANGUAGES, "")
-
-TARGET_HEADER_BUILTIN(_InterlockedCompareExchange128, "UcLLiD*LLiLLiLLi*",
"nh", INTRIN_H, ALL_MS_LANGUAGES, "cx16")
-
-TARGET_BUILTIN(__builtin_ia32_readeflags_u64, "UOi", "n", "")
-TARGET_BUILTIN(__builtin_ia32_writeeflags_u64, "vUOi", "n", "")
-TARGET_BUILTIN(__builtin_ia32_cvtss2si64, "OiV4f", "ncV:128:", "sse")
-TARGET_BUILTIN(__builtin_ia32_cvttss2si64, "OiV4f", "ncV:128:", "sse")
-TARGET_BUILTIN(__builtin_ia32_cvtsd2si64, "OiV2d", "ncV:128:", "sse2")
-TARGET_BUILTIN(__builtin_ia32_cvttsd2si64, "OiV2d", "ncV:128:", "sse2")
-TARGET_BUILTIN(__builtin_ia32_movnti64, "vOi*Oi", "n", "sse2")
-TARGET_BUILTIN(__builtin_ia32_vec_set_v2di, "V2OiV2OiOiIi", "ncV:128:",
"sse4.1")
-TARGET_BUILTIN(__builtin_ia32_crc32di, "UOiUOiUOi", "nc", "crc32")
-TARGET_BUILTIN(__builtin_ia32_vec_ext_v4di, "OiV4OiIi", "ncV:256:", "avx")
-TARGET_BUILTIN(__builtin_ia32_vec_set_v4di, "V4OiV4OiOiIi", "ncV:256:", "avx")
-TARGET_BUILTIN(__builtin_ia32_rdfsbase32, "Ui", "n", "fsgsbase")
-TARGET_BUILTIN(__builtin_ia32_rdfsbase64, "UOi", "n", "fsgsbase")
-TARGET_BUILTIN(__builtin_ia32_rdgsbase32, "Ui", "n", "fsgsbase")
-TARGET_BUILTIN(__builtin_ia32_rdgsbase64, "UOi", "n", "fsgsbase")
-TARGET_BUILTIN(__builtin_ia32_wrfsbase32, "vUi", "n", "fsgsbase")
-TARGET_BUILTIN(__builtin_ia32_wrfsbase64, "vUOi", "n", "fsgsbase")
-TARGET_BUILTIN(__builtin_ia32_wrgsbase32, "vUi", "n", "fsgsbase")
-TARGET_BUILTIN(__builtin_ia32_wrgsbase64, "vUOi", "n", "fsgsbase")
-TARGET_BUILTIN(__builtin_ia32_fxrstor64, "vv*", "n", "fxsr")
-TARGET_BUILTIN(__builtin_ia32_fxsave64, "vv*", "n", "fxsr")
-TARGET_BUILTIN(__builtin_ia32_xsave64, "vv*UOi", "n", "xsave")
-TARGET_BUILTIN(__builtin_ia32_xrstor64, "vv*UOi", "n", "xsave")
-TARGET_BUILTIN(__builtin_ia32_xsaveopt64, "vv*UOi", "n", "xsaveopt")
-TARGET_BUILTIN(__builtin_ia32_xrstors64, "vv*UOi", "n", "xsaves")
-TARGET_BUILTIN(__builtin_ia32_xsavec64, "vv*UOi", "n", "xsavec")
-TARGET_BUILTIN(__builtin_ia32_xsaves64, "vv*UOi", "n", "xsaves")
-TARGET_BUILTIN(__builtin_ia32_incsspq, "vUOi", "n", "shstk")
-TARGET_BUILTIN(__builtin_ia32_rdsspq, "UOiUOi", "n", "shstk")
-TARGET_BUILTIN(__builtin_ia32_wrssq, "vUOiv*", "n", "shstk")
-TARGET_BUILTIN(__builtin_ia32_wrussq, "vUOiv*", "n", "shstk")
-TARGET_BUILTIN(__builtin_ia32_addcarryx_u64, "UcUcUOiUOiUOi*", "nE", "")
-TARGET_BUILTIN(__builtin_ia32_subborrow_u64, "UcUcUOiUOiUOi*", "nE", "")
-TARGET_BUILTIN(__builtin_ia32_rdrand64_step, "UiUOi*", "n", "rdrnd")
-TARGET_BUILTIN(__builtin_ia32_rdseed64_step, "UiUOi*", "n", "rdseed")
-TARGET_BUILTIN(__builtin_ia32_lzcnt_u64, "UOiUOi", "ncE", "lzcnt")
-TARGET_BUILTIN(__builtin_ia32_bextr_u64, "UOiUOiUOi", "ncE", "bmi")
-TARGET_BUILTIN(__builtin_ia32_tzcnt_u64, "UOiUOi", "ncE", "")
-TARGET_BUILTIN(__builtin_ia32_bzhi_di, "UOiUOiUOi", "ncE", "bmi2")
-TARGET_BUILTIN(__builtin_ia32_pdep_di, "UOiUOiUOi", "ncE", "bmi2")
-TARGET_BUILTIN(__builtin_ia32_pext_di, "UOiUOiUOi", "ncE", "bmi2")
-TARGET_BUILTIN(__builtin_ia32_bextri_u64, "UOiUOiIUOi", "ncE", "tbm")
-TARGET_BUILTIN(__builtin_ia32_lwpins64, "UcUOiUiIUi", "n", "lwp")
-TARGET_BUILTIN(__builtin_ia32_lwpval64, "vUOiUiIUi", "n", "lwp")
-TARGET_BUILTIN(__builtin_ia32_vcvtsd2si64, "OiV2dIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_vcvtsd2usi64, "UOiV2dIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_vcvtss2si64, "OiV4fIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_vcvtss2usi64, "UOiV4fIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_vcvttsd2si64, "OiV2dIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_vcvttsd2usi64, "UOiV2dIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_vcvttss2si64, "OiV4fIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_vcvttss2usi64, "UOiV4fIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_cvtsi2sd64, "V2dV2dOiIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_cvtsi2ss64, "V4fV4fOiIi", "ncV:128:", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_cvtusi2sd64, "V2dV2dUOiIi", "ncV:128:",
"avx512f")
-TARGET_BUILTIN(__builtin_ia32_cvtusi2ss64, "V4fV4fUOiIi", "ncV:128:",
"avx512f")
-TARGET_BUILTIN(__builtin_ia32_vcvtsh2si64, "OiV8xIi", "ncV:128:", "avx512fp16")
-TARGET_BUILTIN(__builtin_ia32_vcvtsh2usi64, "UOiV8xIi", "ncV:128:",
"avx512fp16")
-TARGET_BUILTIN(__builtin_ia32_vcvtusi642sh, "V8xV8xUOiIi", "ncV:128:",
"avx512fp16")
-TARGET_BUILTIN(__builtin_ia32_vcvtsi642sh, "V8xV8xOiIi", "ncV:128:",
"avx512fp16")
-TARGET_BUILTIN(__builtin_ia32_vcvttsh2si64, "OiV8xIi", "ncV:128:",
"avx512fp16")
-TARGET_BUILTIN(__builtin_ia32_vcvttsh2usi64, "UOiV8xIi", "ncV:128:",
"avx512fp16")
-TARGET_BUILTIN(__builtin_ia32_directstore_u64, "vULi*ULi", "n", "movdiri")
-
-// AVX10.2 SATCVT-DS
-TARGET_BUILTIN(__builtin_ia32_vcvttsd2sis64, "OiV2dIi", "ncV:128:",
"avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vcvttsd2usis64, "UOiV2dIi", "ncV:128:",
"avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vcvttss2sis64, "OiV4fIi", "ncV:128:",
"avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vcvttss2usis64, "UOiV4fIi", "ncV:128:",
"avx10.2-256")
-
-// UINTR
-TARGET_BUILTIN(__builtin_ia32_clui, "v", "n", "uintr")
-TARGET_BUILTIN(__builtin_ia32_stui, "v", "n", "uintr")
-TARGET_BUILTIN(__builtin_ia32_testui, "Uc", "n", "uintr")
-TARGET_BUILTIN(__builtin_ia32_senduipi, "vUWi", "n", "uintr")
-// USERMSR
-TARGET_BUILTIN(__builtin_ia32_urdmsr, "ULLiULLi", "n", "usermsr")
-TARGET_BUILTIN(__builtin_ia32_uwrmsr, "vULLiULLi", "n", "usermsr")
-
-// AMX internal builtin
-TARGET_BUILTIN(__builtin_ia32_tile_loadconfig_internal, "vvC*", "n",
"amx-tile")
-TARGET_BUILTIN(__builtin_ia32_tileloadd64_internal, "V256iUsUsvC*z", "n",
"amx-tile")
-TARGET_BUILTIN(__builtin_ia32_tileloaddrs64_internal, "V256iUsUsvC*z", "n",
"amx-movrs")
-TARGET_BUILTIN(__builtin_ia32_tileloaddt164_internal, "V256iUsUsvC*z", "n",
"amx-tile")
-TARGET_BUILTIN(__builtin_ia32_tileloaddrst164_internal, "V256iUsUsvC*z", "n",
"amx-movrs")
-TARGET_BUILTIN(__builtin_ia32_tdpbssd_internal, "V256iUsUsUsV256iV256iV256i",
"n", "amx-int8")
-TARGET_BUILTIN(__builtin_ia32_tdpbsud_internal, "V256iUsUsUsV256iV256iV256i",
"n", "amx-int8")
-TARGET_BUILTIN(__builtin_ia32_tdpbusd_internal, "V256iUsUsUsV256iV256iV256i",
"n", "amx-int8")
-TARGET_BUILTIN(__builtin_ia32_tdpbuud_internal, "V256iUsUsUsV256iV256iV256i",
"n", "amx-int8")
-TARGET_BUILTIN(__builtin_ia32_tilestored64_internal, "vUsUsv*zV256i", "n",
"amx-tile")
-TARGET_BUILTIN(__builtin_ia32_tilezero_internal, "V256iUsUs", "n", "amx-tile")
-TARGET_BUILTIN(__builtin_ia32_tdpbf16ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-bf16")
-TARGET_BUILTIN(__builtin_ia32_tdpfp16ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-fp16")
-TARGET_BUILTIN(__builtin_ia32_tcmmimfp16ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-complex")
-TARGET_BUILTIN(__builtin_ia32_tcmmrlfp16ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-complex")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0_internal, "vUsUsUsV256i*V256i*vC*z",
"n", "amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0rs_internal,
"vUsUsUsV256i*V256i*vC*z", "n", "amx-movrs,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0t1_internal,
"vUsUsUsV256i*V256i*vC*z", "n", "amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0rst1_internal,
"vUsUsUsV256i*V256i*vC*z", "n", "amx-movrs,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1_internal, "vUsUsUsV256i*V256i*vC*z",
"n", "amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1rs_internal,
"vUsUsUsV256i*V256i*vC*z", "n", "amx-movrs,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1t1_internal,
"vUsUsUsV256i*V256i*vC*z", "n", "amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1rst1_internal,
"vUsUsUsV256i*V256i*vC*z", "n", "amx-movrs,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_ttransposed_internal, "V256iUsUsV256i", "n",
"amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_ttdpbf16ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-bf16,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_ttdpfp16ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-fp16,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_ttcmmimfp16ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-complex,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_ttcmmrlfp16ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-complex,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_tconjtcmmimfp16ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-complex,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_tconjtfp16_internal, "V256iUsUsV256i", "n",
"amx-complex,amx-transpose")
-
-TARGET_BUILTIN(__builtin_ia32_tcvtrowd2ps_internal, "V16fUsUsV256iUi", "n",
"amx-avx512,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_tcvtrowps2pbf16h_internal, "V32yUsUsV256iUi",
"n", "amx-avx512,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_tcvtrowps2pbf16l_internal, "V32yUsUsV256iUi",
"n", "amx-avx512,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_tcvtrowps2phh_internal, "V32xUsUsV256iUi", "n",
"amx-avx512,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_tcvtrowps2phl_internal, "V32xUsUsV256iUi", "n",
"amx-avx512,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_tilemovrow_internal, "V16iUsUsV256iUi", "n",
"amx-avx512,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_tmmultf32ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-tf32")
-TARGET_BUILTIN(__builtin_ia32_ttmmultf32ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-tf32,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_tdpbf8ps_internal, "V256iUsUsUsV256iV256iV256i",
"n", "amx-fp8")
-TARGET_BUILTIN(__builtin_ia32_tdpbhf8ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-fp8")
-TARGET_BUILTIN(__builtin_ia32_tdphbf8ps_internal,
"V256iUsUsUsV256iV256iV256i", "n", "amx-fp8")
-TARGET_BUILTIN(__builtin_ia32_tdphf8ps_internal, "V256iUsUsUsV256iV256iV256i",
"n", "amx-fp8")
-
-// AMX
-TARGET_BUILTIN(__builtin_ia32_tile_loadconfig, "vvC*", "n", "amx-tile")
-TARGET_BUILTIN(__builtin_ia32_tile_storeconfig, "vvC*", "n", "amx-tile")
-TARGET_BUILTIN(__builtin_ia32_tilerelease, "v", "n", "amx-tile")
-TARGET_BUILTIN(__builtin_ia32_tilezero, "vUc", "n", "amx-tile")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0rs, "vIUcvC*z", "n",
"amx-movrs,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0rst1, "vIUcvC*z", "n",
"amx-movrs,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1rs, "vIUcvC*z", "n",
"amx-movrs,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1rst1, "vIUcvC*z", "n",
"amx-movrs,amx-transpose")
-
-TARGET_BUILTIN(__builtin_ia32_tileloaddrs64, "vIUcvC*z", "n", "amx-movrs")
-TARGET_BUILTIN(__builtin_ia32_tileloaddrst164, "vIUcvC*z", "n", "amx-movrs")
-
-TARGET_BUILTIN(__builtin_ia32_tileloadd64, "vIUcvC*z", "n", "amx-tile")
-TARGET_BUILTIN(__builtin_ia32_tileloaddt164, "vIUcvC*z", "n", "amx-tile")
-TARGET_BUILTIN(__builtin_ia32_tilestored64, "vIUcv*z", "n", "amx-tile")
-
-TARGET_BUILTIN(__builtin_ia32_tdpbssd, "vIUcIUcIUc", "n", "amx-int8")
-TARGET_BUILTIN(__builtin_ia32_tdpbsud, "vIUcIUcIUc", "n", "amx-int8")
-TARGET_BUILTIN(__builtin_ia32_tdpbusd, "vIUcIUcIUc", "n", "amx-int8")
-TARGET_BUILTIN(__builtin_ia32_tdpbuud, "vIUcIUcIUc", "n", "amx-int8")
-TARGET_BUILTIN(__builtin_ia32_tdpbf16ps, "vIUcIUcIUc", "n", "amx-bf16")
-TARGET_BUILTIN(__builtin_ia32_ptwrite64, "vUOi", "n", "ptwrite")
-
-TARGET_BUILTIN(__builtin_ia32_tcmmimfp16ps, "vIUcIUcIUc", "n", "amx-complex")
-TARGET_BUILTIN(__builtin_ia32_tcmmrlfp16ps, "vIUcIUcIUc", "n", "amx-complex")
-
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0, "vIUcvC*z", "n", "amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0t1, "vIUcvC*z", "n","amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1, "vIUcvC*z", "n", "amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1t1, "vIUcvC*z", "n","amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_ttransposed, "vIUcIUc", "n", "amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_ttdpbf16ps, "vIUcIUcIUc", "n",
"amx-bf16,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_ttdpfp16ps, "vIUcIUcIUc", "n",
"amx-fp16,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_ttcmmimfp16ps, "vIUcIUcIUc", "n",
"amx-complex,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_ttcmmrlfp16ps, "vIUcIUcIUc", "n",
"amx-complex,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_tconjtcmmimfp16ps, "vIUcIUcIUc", "n",
"amx-complex,amx-transpose")
-TARGET_BUILTIN(__builtin_ia32_tconjtfp16, "vIUcIUc", "n",
"amx-complex,amx-transpose")
-
-TARGET_BUILTIN(__builtin_ia32_tcvtrowd2ps, "V16fIUcUi", "n",
"amx-avx512,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_tcvtrowps2pbf16h, "V32yIUcUi", "n",
"amx-avx512,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_tcvtrowps2pbf16l, "V32yIUcUi", "n",
"amx-avx512,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_tcvtrowps2phh, "V32xIUcUi", "n",
"amx-avx512,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_tcvtrowps2phl, "V32xIUcUi", "n",
"amx-avx512,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_tilemovrow, "V16iIUcUi", "n",
"amx-avx512,avx10.2-512")
-
-// AMX_FP16 FP16
-TARGET_BUILTIN(__builtin_ia32_tdpfp16ps, "vIUcIUcIUc", "n", "amx-fp16")
-
-// AMX FP8
-TARGET_BUILTIN(__builtin_ia32_tdpbf8ps, "vIUcUIcUIc", "n", "amx-fp8")
-TARGET_BUILTIN(__builtin_ia32_tdpbhf8ps, "vIUcUIcUIc", "n", "amx-fp8")
-TARGET_BUILTIN(__builtin_ia32_tdphbf8ps, "vIUcUIcUIc", "n", "amx-fp8")
-TARGET_BUILTIN(__builtin_ia32_tdphf8ps, "vIUcUIcUIc", "n", "amx-fp8")
-
-// AMX TF32
-TARGET_BUILTIN(__builtin_ia32_tmmultf32ps, "vIUcIUcIUc", "n", "amx-tf32")
-TARGET_BUILTIN(__builtin_ia32_ttmmultf32ps, "vIUcIUcIUc", "n",
"amx-tf32,amx-transpose")
-
-TARGET_BUILTIN(__builtin_ia32_prefetchi, "vvC*Ui", "nc", "prefetchi")
-TARGET_BUILTIN(__builtin_ia32_cmpccxadd32, "Siv*SiSiIi", "n", "cmpccxadd")
-TARGET_BUILTIN(__builtin_ia32_cmpccxadd64, "SLLiSLLi*SLLiSLLiIi", "n",
"cmpccxadd")
-
-// RAO-INT
-TARGET_BUILTIN(__builtin_ia32_aadd64, "vv*SOi", "n", "raoint")
-TARGET_BUILTIN(__builtin_ia32_aand64, "vv*SOi", "n", "raoint")
-TARGET_BUILTIN(__builtin_ia32_aor64, "vv*SOi", "n", "raoint")
-TARGET_BUILTIN(__builtin_ia32_axor64, "vv*SOi", "n", "raoint")
-
-// MOVRS
-TARGET_BUILTIN(__builtin_ia32_movrsqi, "ScvC*", "n", "movrs")
-TARGET_BUILTIN(__builtin_ia32_movrshi, "SsvC*", "n", "movrs")
-TARGET_BUILTIN(__builtin_ia32_movrssi, "SivC*", "n", "movrs")
-TARGET_BUILTIN(__builtin_ia32_movrsdi, "SLLivC*", "n", "movrs")
-
-// MOVRS and AVX10.2
-TARGET_BUILTIN(__builtin_ia32_vmovrsb128, "V16cV16cC*", "nV:128:",
"movrs,avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vmovrsb256, "V32cV32cC*", "nV:256:",
"movrs,avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vmovrsb512, "V64cV64cC*", "nV:512:",
"movrs,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_vmovrsd128, "V4iV4iC*", "nV:128:",
"movrs,avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vmovrsd256, "V8iV8iC*", "nV:256:",
"movrs,avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vmovrsd512, "V16iV16iC*", "nV:512:",
"movrs,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_vmovrsq128, "V2OiV2OiC*", "nV:128:",
"movrs,avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vmovrsq256, "V4OiV4OiC*", "nV:256:",
"movrs,avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vmovrsq512, "V8OiV8OiC*", "nV:512:",
"movrs,avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_vmovrsw128, "V8sV8sC*", "nV:128:",
"movrs,avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vmovrsw256, "V16sV16sC*", "nV:256:",
"movrs,avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vmovrsw512, "V32sV32sC*", "nV:512:",
"movrs,avx10.2-512")
-
-#undef BUILTIN
-#undef TARGET_BUILTIN
-#undef TARGET_HEADER_BUILTIN
diff --git a/clang/include/clang/Basic/BuiltinsX86_64.td
b/clang/include/clang/Basic/BuiltinsX86_64.td
new file mode 100644
index 00000000000000..a6c6ef80eac212
--- /dev/null
+++ b/clang/include/clang/Basic/BuiltinsX86_64.td
@@ -0,0 +1,485 @@
+//===--- BuiltinsX86_64.td - X86-64 Builtin function database ---*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the X86-64-specific builtin function database.
+//
+//===----------------------------------------------------------------------===//
+
+include "clang/Basic/BuiltinsX86Base.td"
+
+let Header = "intrin.h", Languages = "ALL_MS_LANGUAGES", Attributes =
[NoThrow, RequireDeclaration] in {
+ def _BitScanForward64 : X86LibBuiltin<"unsigned char(msuint32_t *, unsigned
long long int)">;
+ def _BitScanReverse64 : X86LibBuiltin<"unsigned char(msuint32_t *, unsigned
long long int)">;
+}
+
+let Header = "intrin.h", Languages = "ALL_MS_LANGUAGES", Attributes =
[NoThrow, Const, RequireDeclaration] in {
+ def __mulh : X86LibBuiltin<"long long int(long long int, long long int)">;
+ def __umulh : X86LibBuiltin<"unsigned long long int(unsigned long long int,
unsigned long long int)">;
+ def _mul128 : X86LibBuiltin<"long long int(long long int, long long int,
long long int *)">;
+ def _umul128 : X86LibBuiltin<"unsigned long long int(unsigned long long int,
unsigned long long int, unsigned long long int *)">;
+}
+
+let Header = "intrin.h", Languages = "ALL_MS_LANGUAGES", Attributes =
[NoThrow, RequireDeclaration] in {
+ def __faststorefence : X86LibBuiltin<"void()">;
+}
+
+let Header = "intrin.h", Languages = "ALL_MS_LANGUAGES", Attributes =
[NoThrow, Const, RequireDeclaration] in {
+ def __shiftleft128 : X86LibBuiltin<"unsigned long long int(unsigned long
long int, unsigned long long int, unsigned char)">;
+ def __shiftright128 : X86LibBuiltin<"unsigned long long int(unsigned long
long int, unsigned long long int, unsigned char)">;
+}
+
+let Features = "cx16", Header = "intrin.h", Languages = "ALL_MS_LANGUAGES",
Attributes = [NoThrow, RequireDeclaration] in {
+ def _InterlockedCompareExchange128 : X86LibBuiltin<"unsigned char(long long
int volatile *, long long int, long long int, long long int *)">;
+}
+
+let Attributes = [NoThrow] in {
+ def readeflags_u64 : X86Builtin<"unsigned long long int()">;
+ def writeeflags_u64 : X86Builtin<"void(unsigned long long int)">;
+}
+
+let Features = "sse", Attributes = [NoThrow, Const, RequiredVectorWidth<128>]
in {
+ def cvtss2si64 : X86Builtin<"long long int(_Vector<4, float>)">;
+ def cvttss2si64 : X86Builtin<"long long int(_Vector<4, float>)">;
+}
+
+let Features = "sse2", Attributes = [NoThrow, Const, RequiredVectorWidth<128>]
in {
+ def cvtsd2si64 : X86Builtin<"long long int(_Vector<2, double>)">;
+ def cvttsd2si64 : X86Builtin<"long long int(_Vector<2, double>)">;
+}
+
+let Features = "sse2", Attributes = [NoThrow] in {
+ def movnti64 : X86Builtin<"void(long long int *, long long int)">;
+}
+
+let Features = "sse4.1", Attributes = [NoThrow, Const,
RequiredVectorWidth<128>] in {
+ def vec_set_v2di : X86Builtin<"_Vector<2, long long int>(_Vector<2, long
long int>, long long int, _Constant int)">;
+}
+
+let Features = "crc32", Attributes = [NoThrow, Const] in {
+ def crc32di : X86Builtin<"unsigned long long int(unsigned long long int,
unsigned long long int)">;
+}
+
+let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>]
in {
+ def vec_ext_v4di : X86Builtin<"long long int(_Vector<4, long long int>,
_Constant int)">;
+ def vec_set_v4di : X86Builtin<"_Vector<4, long long int>(_Vector<4, long
long int>, long long int, _Constant int)">;
+}
+
+let Features = "fsgsbase", Attributes = [NoThrow] in {
+ def rdfsbase32 : X86Builtin<"unsigned int()">;
+ def rdfsbase64 : X86Builtin<"unsigned long long int()">;
+ def rdgsbase32 : X86Builtin<"unsigned int()">;
+ def rdgsbase64 : X86Builtin<"unsigned long long int()">;
+ def wrfsbase32 : X86Builtin<"void(unsigned int)">;
+ def wrfsbase64 : X86Builtin<"void(unsigned long long int)">;
+ def wrgsbase32 : X86Builtin<"void(unsigned int)">;
+ def wrgsbase64 : X86Builtin<"void(unsigned long long int)">;
+}
+
+let Features = "fxsr", Attributes = [NoThrow] in {
+ def fxrstor64 : X86Builtin<"void(void *)">;
+ def fxsave64 : X86Builtin<"void(void *)">;
+}
+
+let Features = "xsave", Attributes = [NoThrow] in {
+ def xsave64 : X86Builtin<"void(void *, unsigned long long int)">;
+ def xrstor64 : X86Builtin<"void(void *, unsigned long long int)">;
+}
+
+let Features = "xsaveopt", Attributes = [NoThrow] in {
+ def xsaveopt64 : X86Builtin<"void(void *, unsigned long long int)">;
+}
+
+let Features = "xsaves", Attributes = [NoThrow] in {
+ def xrstors64 : X86Builtin<"void(void *, unsigned long long int)">;
+}
+
+let Features = "xsavec", Attributes = [NoThrow] in {
+ def xsavec64 : X86Builtin<"void(void *, unsigned long long int)">;
+}
+
+let Features = "xsaves", Attributes = [NoThrow] in {
+ def xsaves64 : X86Builtin<"void(void *, unsigned long long int)">;
+}
+
+let Features = "shstk", Attributes = [NoThrow] in {
+ def incsspq : X86Builtin<"void(unsigned long long int)">;
+ def rdsspq : X86Builtin<"unsigned long long int(unsigned long long int)">;
+ def wrssq : X86Builtin<"void(unsigned long long int, void *)">;
+ def wrussq : X86Builtin<"void(unsigned long long int, void *)">;
+}
+
+let Attributes = [NoThrow, Constexpr] in {
+ def addcarryx_u64 : X86Builtin<"unsigned char(unsigned char, unsigned long
long int, unsigned long long int, unsigned long long int *)">;
+ def subborrow_u64 : X86Builtin<"unsigned char(unsigned char, unsigned long
long int, unsigned long long int, unsigned long long int *)">;
+}
+
+let Features = "rdrnd", Attributes = [NoThrow] in {
+ def rdrand64_step : X86Builtin<"unsigned int(unsigned long long int *)">;
+}
+
+let Features = "rdseed", Attributes = [NoThrow] in {
+ def rdseed64_step : X86Builtin<"unsigned int(unsigned long long int *)">;
+}
+
+let Features = "lzcnt", Attributes = [NoThrow, Const, Constexpr] in {
+ def lzcnt_u64 : X86Builtin<"unsigned long long int(unsigned long long int)">;
+}
+
+let Features = "bmi", Attributes = [NoThrow, Const, Constexpr] in {
+ def bextr_u64 : X86Builtin<"unsigned long long int(unsigned long long int,
unsigned long long int)">;
+}
+
+let Attributes = [NoThrow, Const, Constexpr] in {
+ def tzcnt_u64 : X86Builtin<"unsigned long long int(unsigned long long int)">;
+}
+
+let Features = "bmi2", Attributes = [NoThrow, Const, Constexpr] in {
+ def bzhi_di : X86Builtin<"unsigned long long int(unsigned long long int,
unsigned long long int)">;
+ def pdep_di : X86Builtin<"unsigned long long int(unsigned long long int,
unsigned long long int)">;
+ def pext_di : X86Builtin<"unsigned long long int(unsigned long long int,
unsigned long long int)">;
+}
+
+let Features = "tbm", Attributes = [NoThrow, Const, Constexpr] in {
+ def bextri_u64 : X86Builtin<"unsigned long long int(unsigned long long int,
_Constant unsigned long long int)">;
+}
+
+let Features = "lwp", Attributes = [NoThrow] in {
+ def lwpins64 : X86Builtin<"unsigned char(unsigned long long int, unsigned
int, _Constant unsigned int)">;
+ def lwpval64 : X86Builtin<"void(unsigned long long int, unsigned int,
_Constant unsigned int)">;
+}
+
+let Features = "avx512f", Attributes = [NoThrow, Const,
RequiredVectorWidth<128>] in {
+ def vcvtsd2si64 : X86Builtin<"long long int(_Vector<2, double>, _Constant
int)">;
+ def vcvtsd2usi64 : X86Builtin<"unsigned long long int(_Vector<2, double>,
_Constant int)">;
+ def vcvtss2si64 : X86Builtin<"long long int(_Vector<4, float>, _Constant
int)">;
+ def vcvtss2usi64 : X86Builtin<"unsigned long long int(_Vector<4, float>,
_Constant int)">;
+ def vcvttsd2si64 : X86Builtin<"long long int(_Vector<2, double>, _Constant
int)">;
+ def vcvttsd2usi64 : X86Builtin<"unsigned long long int(_Vector<2, double>,
_Constant int)">;
+ def vcvttss2si64 : X86Builtin<"long long int(_Vector<4, float>, _Constant
int)">;
+ def vcvttss2usi64 : X86Builtin<"unsigned long long int(_Vector<4, float>,
_Constant int)">;
+ def cvtsi2sd64 : X86Builtin<"_Vector<2, double>(_Vector<2, double>, long
long int, _Constant int)">;
+ def cvtsi2ss64 : X86Builtin<"_Vector<4, float>(_Vector<4, float>, long long
int, _Constant int)">;
+ def cvtusi2sd64 : X86Builtin<"_Vector<2, double>(_Vector<2, double>,
unsigned long long int, _Constant int)">;
+ def cvtusi2ss64 : X86Builtin<"_Vector<4, float>(_Vector<4, float>, unsigned
long long int, _Constant int)">;
+}
+
+let Features = "avx512fp16", Attributes = [NoThrow, Const,
RequiredVectorWidth<128>] in {
+ def vcvtsh2si64 : X86Builtin<"long long int(_Vector<8, _Float16>, _Constant
int)">;
+ def vcvtsh2usi64 : X86Builtin<"unsigned long long int(_Vector<8, _Float16>,
_Constant int)">;
+ def vcvtusi642sh : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>,
unsigned long long int, _Constant int)">;
+ def vcvtsi642sh : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>,
long long int, _Constant int)">;
+ def vcvttsh2si64 : X86Builtin<"long long int(_Vector<8, _Float16>, _Constant
int)">;
+ def vcvttsh2usi64 : X86Builtin<"unsigned long long int(_Vector<8, _Float16>,
_Constant int)">;
+}
+
+let Features = "movdiri", Attributes = [NoThrow] in {
+ def directstore_u64 : X86Builtin<"void(unsigned long int *, unsigned long
int)">;
+}
+
+let Features = "avx10.2-256", Attributes = [NoThrow, Const,
RequiredVectorWidth<128>] in {
+ def vcvttsd2sis64 : X86Builtin<"long long int(_Vector<2, double>, _Constant
int)">;
+ def vcvttsd2usis64 : X86Builtin<"unsigned long long int(_Vector<2, double>,
_Constant int)">;
+ def vcvttss2sis64 : X86Builtin<"long long int(_Vector<4, float>, _Constant
int)">;
+ def vcvttss2usis64 : X86Builtin<"unsigned long long int(_Vector<4, float>,
_Constant int)">;
+}
+
+let Features = "uintr", Attributes = [NoThrow] in {
+ def clui : X86Builtin<"void()">;
+ def stui : X86Builtin<"void()">;
+ def testui : X86Builtin<"unsigned char()">;
+ def senduipi : X86Builtin<"void(uint64_t)">;
+}
+
+let Features = "usermsr", Attributes = [NoThrow] in {
+ def urdmsr : X86Builtin<"unsigned long long int(unsigned long long int)">;
+ def uwrmsr : X86Builtin<"void(unsigned long long int, unsigned long long
int)">;
+}
+
+let Features = "amx-tile", Attributes = [NoThrow] in {
+ def tile_loadconfig_internal : X86Builtin<"void(void const *)">;
+ def tileloadd64_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, void const *, size_t)">;
+}
+
+let Features = "amx-movrs", Attributes = [NoThrow] in {
+ def tileloaddrs64_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, void const *, size_t)">;
+}
+
+let Features = "amx-tile", Attributes = [NoThrow] in {
+ def tileloaddt164_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, void const *, size_t)">;
+}
+
+let Features = "amx-movrs", Attributes = [NoThrow] in {
+ def tileloaddrst164_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, void const *, size_t)">;
+}
+
+let Features = "amx-int8", Attributes = [NoThrow] in {
+ def tdpbssd_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+ def tdpbsud_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+ def tdpbusd_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+ def tdpbuud_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+}
+
+let Features = "amx-tile", Attributes = [NoThrow] in {
+ def tilestored64_internal : X86Builtin<"void(unsigned short, unsigned short,
void *, size_t, _Vector<256, int>)">;
+ def tilezero_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short)">;
+}
+
+let Features = "amx-bf16", Attributes = [NoThrow] in {
+ def tdpbf16ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+}
+
+let Features = "amx-fp16", Attributes = [NoThrow] in {
+ def tdpfp16ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+}
+
+let Features = "amx-complex", Attributes = [NoThrow] in {
+ def tcmmimfp16ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+ def tcmmrlfp16ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+}
+
+let Features = "amx-transpose", Attributes = [NoThrow] in {
+ def t2rpntlvwz0_internal : X86Builtin<"void(unsigned short, unsigned short,
unsigned short, _Vector<256, int *>, _Vector<256, int *>, void const *,
size_t)">;
+}
+
+let Features = "amx-movrs,amx-transpose", Attributes = [NoThrow] in {
+ def t2rpntlvwz0rs_internal : X86Builtin<"void(unsigned short, unsigned
short, unsigned short, _Vector<256, int *>, _Vector<256, int *>, void const *,
size_t)">;
+}
+
+let Features = "amx-transpose", Attributes = [NoThrow] in {
+ def t2rpntlvwz0t1_internal : X86Builtin<"void(unsigned short, unsigned
short, unsigned short, _Vector<256, int *>, _Vector<256, int *>, void const *,
size_t)">;
+}
+
+let Features = "amx-movrs,amx-transpose", Attributes = [NoThrow] in {
+ def t2rpntlvwz0rst1_internal : X86Builtin<"void(unsigned short, unsigned
short, unsigned short, _Vector<256, int *>, _Vector<256, int *>, void const *,
size_t)">;
+}
+
+let Features = "amx-transpose", Attributes = [NoThrow] in {
+ def t2rpntlvwz1_internal : X86Builtin<"void(unsigned short, unsigned short,
unsigned short, _Vector<256, int *>, _Vector<256, int *>, void const *,
size_t)">;
+}
+
+let Features = "amx-movrs,amx-transpose", Attributes = [NoThrow] in {
+ def t2rpntlvwz1rs_internal : X86Builtin<"void(unsigned short, unsigned
short, unsigned short, _Vector<256, int *>, _Vector<256, int *>, void const *,
size_t)">;
+}
+
+let Features = "amx-transpose", Attributes = [NoThrow] in {
+ def t2rpntlvwz1t1_internal : X86Builtin<"void(unsigned short, unsigned
short, unsigned short, _Vector<256, int *>, _Vector<256, int *>, void const *,
size_t)">;
+}
+
+let Features = "amx-movrs,amx-transpose", Attributes = [NoThrow] in {
+ def t2rpntlvwz1rst1_internal : X86Builtin<"void(unsigned short, unsigned
short, unsigned short, _Vector<256, int *>, _Vector<256, int *>, void const *,
size_t)">;
+}
+
+let Features = "amx-transpose", Attributes = [NoThrow] in {
+ def ttransposed_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, _Vector<256, int>)">;
+}
+
+let Features = "amx-bf16,amx-transpose", Attributes = [NoThrow] in {
+ def ttdpbf16ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+}
+
+let Features = "amx-fp16,amx-transpose", Attributes = [NoThrow] in {
+ def ttdpfp16ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+}
+
+let Features = "amx-complex,amx-transpose", Attributes = [NoThrow] in {
+ def ttcmmimfp16ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+ def ttcmmrlfp16ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+ def tconjtcmmimfp16ps_internal : X86Builtin<"_Vector<256, int>(unsigned
short, unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+ def tconjtfp16_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, _Vector<256, int>)">;
+}
+
+let Features = "amx-avx512,avx10.2-512", Attributes = [NoThrow] in {
+ def tcvtrowd2ps_internal : X86Builtin<"_Vector<16, float>(unsigned short,
unsigned short, _Vector<256, int>, unsigned int)">;
+ def tcvtrowps2pbf16h_internal : X86Builtin<"_Vector<32, __bf16>(unsigned
short, unsigned short, _Vector<256, int>, unsigned int)">;
+ def tcvtrowps2pbf16l_internal : X86Builtin<"_Vector<32, __bf16>(unsigned
short, unsigned short, _Vector<256, int>, unsigned int)">;
+ def tcvtrowps2phh_internal : X86Builtin<"_Vector<32, _Float16>(unsigned
short, unsigned short, _Vector<256, int>, unsigned int)">;
+ def tcvtrowps2phl_internal : X86Builtin<"_Vector<32, _Float16>(unsigned
short, unsigned short, _Vector<256, int>, unsigned int)">;
+ def tilemovrow_internal : X86Builtin<"_Vector<16, int>(unsigned short,
unsigned short, _Vector<256, int>, unsigned int)">;
+}
+
+let Features = "amx-tf32", Attributes = [NoThrow] in {
+ def tmmultf32ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+}
+
+let Features = "amx-tf32,amx-transpose", Attributes = [NoThrow] in {
+ def ttmmultf32ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+}
+
+let Features = "amx-fp8", Attributes = [NoThrow] in {
+ def tdpbf8ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+ def tdpbhf8ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+ def tdphbf8ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+ def tdphf8ps_internal : X86Builtin<"_Vector<256, int>(unsigned short,
unsigned short, unsigned short, _Vector<256, int>, _Vector<256, int>,
_Vector<256, int>)">;
+}
+
+let Features = "amx-tile", Attributes = [NoThrow] in {
+ def tile_loadconfig : X86Builtin<"void(void const *)">;
+ def tile_storeconfig : X86Builtin<"void(void const *)">;
+ def tilerelease : X86Builtin<"void()">;
+ def tilezero : X86Builtin<"void(unsigned char)">;
+}
+
+let Features = "amx-movrs,amx-transpose", Attributes = [NoThrow] in {
+ def t2rpntlvwz0rs : X86Builtin<"void(_Constant unsigned char, void const *,
size_t)">;
+ def t2rpntlvwz0rst1 : X86Builtin<"void(_Constant unsigned char, void const
*, size_t)">;
+ def t2rpntlvwz1rs : X86Builtin<"void(_Constant unsigned char, void const *,
size_t)">;
+ def t2rpntlvwz1rst1 : X86Builtin<"void(_Constant unsigned char, void const
*, size_t)">;
+}
+
+let Features = "amx-movrs", Attributes = [NoThrow] in {
+ def tileloaddrs64 : X86Builtin<"void(_Constant unsigned char, void const *,
size_t)">;
+ def tileloaddrst164 : X86Builtin<"void(_Constant unsigned char, void const
*, size_t)">;
+}
+
+let Features = "amx-tile", Attributes = [NoThrow] in {
+ def tileloadd64 : X86Builtin<"void(_Constant unsigned char, void const *,
size_t)">;
+ def tileloaddt164 : X86Builtin<"void(_Constant unsigned char, void const *,
size_t)">;
+ def tilestored64 : X86Builtin<"void(_Constant unsigned char, void *,
size_t)">;
+}
+
+let Features = "amx-int8", Attributes = [NoThrow] in {
+ def tdpbssd : X86Builtin<"void(_Constant unsigned char, _Constant unsigned
char, _Constant unsigned char)">;
+ def tdpbsud : X86Builtin<"void(_Constant unsigned char, _Constant unsigned
char, _Constant unsigned char)">;
+ def tdpbusd : X86Builtin<"void(_Constant unsigned char, _Constant unsigned
char, _Constant unsigned char)">;
+ def tdpbuud : X86Builtin<"void(_Constant unsigned char, _Constant unsigned
char, _Constant unsigned char)">;
+}
+
+let Features = "amx-bf16", Attributes = [NoThrow] in {
+ def tdpbf16ps : X86Builtin<"void(_Constant unsigned char, _Constant unsigned
char, _Constant unsigned char)">;
+}
+
+let Features = "ptwrite", Attributes = [NoThrow] in {
+ def ptwrite64 : X86Builtin<"void(unsigned long long int)">;
+}
+
+let Features = "amx-complex", Attributes = [NoThrow] in {
+ def tcmmimfp16ps : X86Builtin<"void(_Constant unsigned char, _Constant
unsigned char, _Constant unsigned char)">;
+ def tcmmrlfp16ps : X86Builtin<"void(_Constant unsigned char, _Constant
unsigned char, _Constant unsigned char)">;
+}
+
+let Features = "amx-transpose", Attributes = [NoThrow] in {
+ def t2rpntlvwz0 : X86Builtin<"void(_Constant unsigned char, void const *,
size_t)">;
+ def t2rpntlvwz0t1 : X86Builtin<"void(_Constant unsigned char, void const *,
size_t)">;
+ def t2rpntlvwz1 : X86Builtin<"void(_Constant unsigned char, void const *,
size_t)">;
+ def t2rpntlvwz1t1 : X86Builtin<"void(_Constant unsigned char, void const *,
size_t)">;
+ def ttransposed : X86Builtin<"void(_Constant unsigned char, _Constant
unsigned char)">;
+}
+
+let Features = "amx-bf16,amx-transpose", Attributes = [NoThrow] in {
+ def ttdpbf16ps : X86Builtin<"void(_Constant unsigned char, _Constant
unsigned char, _Constant unsigned char)">;
+}
+
+let Features = "amx-fp16,amx-transpose", Attributes = [NoThrow] in {
+ def ttdpfp16ps : X86Builtin<"void(_Constant unsigned char, _Constant
unsigned char, _Constant unsigned char)">;
+}
+
+let Features = "amx-complex,amx-transpose", Attributes = [NoThrow] in {
+ def ttcmmimfp16ps : X86Builtin<"void(_Constant unsigned char, _Constant
unsigned char, _Constant unsigned char)">;
+ def ttcmmrlfp16ps : X86Builtin<"void(_Constant unsigned char, _Constant
unsigned char, _Constant unsigned char)">;
+ def tconjtcmmimfp16ps : X86Builtin<"void(_Constant unsigned char, _Constant
unsigned char, _Constant unsigned char)">;
+ def tconjtfp16 : X86Builtin<"void(_Constant unsigned char, _Constant
unsigned char)">;
+}
+
+let Features = "amx-avx512,avx10.2-512", Attributes = [NoThrow] in {
+ def tcvtrowd2ps : X86Builtin<"_Vector<16, float>(_Constant unsigned char,
unsigned int)">;
+ def tcvtrowps2pbf16h : X86Builtin<"_Vector<32, __bf16>(_Constant unsigned
char, unsigned int)">;
+ def tcvtrowps2pbf16l : X86Builtin<"_Vector<32, __bf16>(_Constant unsigned
char, unsigned int)">;
+ def tcvtrowps2phh : X86Builtin<"_Vector<32, _Float16>(_Constant unsigned
char, unsigned int)">;
+ def tcvtrowps2phl : X86Builtin<"_Vector<32, _Float16>(_Constant unsigned
char, unsigned int)">;
+ def tilemovrow : X86Builtin<"_Vector<16, int>(_Constant unsigned char,
unsigned int)">;
+}
+
+let Features = "amx-fp16", Attributes = [NoThrow] in {
+ def tdpfp16ps : X86Builtin<"void(_Constant unsigned char, _Constant unsigned
char, _Constant unsigned char)">;
+}
+
+let Features = "amx-fp8", Attributes = [NoThrow] in {
+ def tdpbf8ps : X86Builtin<"void(_Constant unsigned char, unsigned _Constant
char, unsigned _Constant char)">;
+ def tdpbhf8ps : X86Builtin<"void(_Constant unsigned char, unsigned _Constant
char, unsigned _Constant char)">;
+ def tdphbf8ps : X86Builtin<"void(_Constant unsigned char, unsigned _Constant
char, unsigned _Constant char)">;
+ def tdphf8ps : X86Builtin<"void(_Constant unsigned char, unsigned _Constant
char, unsigned _Constant char)">;
+}
+
+let Features = "amx-tf32", Attributes = [NoThrow] in {
+ def tmmultf32ps : X86Builtin<"void(_Constant unsigned char, _Constant
unsigned char, _Constant unsigned char)">;
+}
+
+let Features = "amx-tf32,amx-transpose", Attributes = [NoThrow] in {
+ def ttmmultf32ps : X86Builtin<"void(_Constant unsigned char, _Constant
unsigned char, _Constant unsigned char)">;
+}
+
+let Features = "prefetchi", Attributes = [NoThrow, Const] in {
+ def prefetchi : X86Builtin<"void(void const *, unsigned int)">;
+}
+
+let Features = "cmpccxadd", Attributes = [NoThrow] in {
+ def cmpccxadd32 : X86Builtin<"signed int(void *, signed int, signed int,
_Constant int)">;
+ def cmpccxadd64 : X86Builtin<"signed long long int(signed long long int *,
signed long long int, signed long long int, _Constant int)">;
+}
+
+let Features = "raoint", Attributes = [NoThrow] in {
+ def aadd64 : X86Builtin<"void(void *, signed long long int)">;
+ def aand64 : X86Builtin<"void(void *, signed long long int)">;
+ def aor64 : X86Builtin<"void(void *, signed long long int)">;
+ def axor64 : X86Builtin<"void(void *, signed long long int)">;
+}
+
+let Features = "movrs", Attributes = [NoThrow] in {
+ def movrsqi : X86Builtin<"signed char(void const *)">;
+ def movrshi : X86Builtin<"signed short(void const *)">;
+ def movrssi : X86Builtin<"signed int(void const *)">;
+ def movrsdi : X86Builtin<"signed long long int(void const *)">;
+}
+
+let Features = "movrs,avx10.2-256", Attributes = [NoThrow,
RequiredVectorWidth<128>] in {
+ def vmovrsb128 : X86Builtin<"_Vector<16, char>(_Vector<16, char const *>)">;
+}
+
+let Features = "movrs,avx10.2-256", Attributes = [NoThrow,
RequiredVectorWidth<256>] in {
+ def vmovrsb256 : X86Builtin<"_Vector<32, char>(_Vector<32, char const *>)">;
+}
+
+let Features = "movrs,avx10.2-512", Attributes = [NoThrow,
RequiredVectorWidth<512>] in {
+ def vmovrsb512 : X86Builtin<"_Vector<64, char>(_Vector<64, char const *>)">;
+}
+
+let Features = "movrs,avx10.2-256", Attributes = [NoThrow,
RequiredVectorWidth<128>] in {
+ def vmovrsd128 : X86Builtin<"_Vector<4, int>(_Vector<4, int const *>)">;
+}
+
+let Features = "movrs,avx10.2-256", Attributes = [NoThrow,
RequiredVectorWidth<256>] in {
+ def vmovrsd256 : X86Builtin<"_Vector<8, int>(_Vector<8, int const *>)">;
+}
+
+let Features = "movrs,avx10.2-512", Attributes = [NoThrow,
RequiredVectorWidth<512>] in {
+ def vmovrsd512 : X86Builtin<"_Vector<16, int>(_Vector<16, int const *>)">;
+}
+
+let Features = "movrs,avx10.2-256", Attributes = [NoThrow,
RequiredVectorWidth<128>] in {
+ def vmovrsq128 : X86Builtin<"_Vector<2, long long int>(_Vector<2, long long
int const *>)">;
+}
+
+let Features = "movrs,avx10.2-256", Attributes = [NoThrow,
RequiredVectorWidth<256>] in {
+ def vmovrsq256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long
int const *>)">;
+}
+
+let Features = "movrs,avx10.2-512", Attributes = [NoThrow,
RequiredVectorWidth<512>] in {
+ def vmovrsq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long
int const *>)">;
+}
+
+let Features = "movrs,avx10.2-256", Attributes = [NoThrow,
RequiredVectorWidth<128>] in {
+ def vmovrsw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short const *>)">;
+}
+
+let Features = "movrs,avx10.2-256", Attributes = [NoThrow,
RequiredVectorWidth<256>] in {
+ def vmovrsw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short const
*>)">;
+}
+
+let Features = "movrs,avx10.2-512", Attributes = [NoThrow,
RequiredVectorWidth<512>] in {
+ def vmovrsw512 : X86Builtin<"_Vector<32, short>(_Vector<32, short const
*>)">;
+}
diff --git a/clang/include/clang/Basic/CMakeLists.txt
b/clang/include/clang/Basic/CMakeLists.txt
index 76ac3367e23a66..1ccc73892fe6e2 100644
--- a/clang/include/clang/Basic/CMakeLists.txt
+++ b/clang/include/clang/Basic/CMakeLists.txt
@@ -64,6 +64,10 @@ clang_tablegen(BuiltinsX86.inc -gen-clang-builtins
SOURCE BuiltinsX86.td
TARGET ClangBuiltinsX86)
+clang_tablegen(BuiltinsX86_64.inc -gen-clang-builtins
+ SOURCE BuiltinsX86_64.td
+ TARGET ClangBuiltinsX86_64)
+
# ARM NEON and MVE
clang_tablegen(arm_neon.inc -gen-arm-neon-sema
SOURCE arm_neon.td
diff --git a/clang/include/clang/Basic/TargetBuiltins.h
b/clang/include/clang/Basic/TargetBuiltins.h
index 556332dd4b217b..914be3691ee812 100644
--- a/clang/include/clang/Basic/TargetBuiltins.h
+++ b/clang/include/clang/Basic/TargetBuiltins.h
@@ -128,7 +128,7 @@ namespace clang {
FirstX86_64Builtin,
LastX86CommonBuiltin = FirstX86_64Builtin - 1,
#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
-#include "clang/Basic/BuiltinsX86_64.def"
+#include "clang/Basic/BuiltinsX86_64.inc"
LastTSBuiltin
};
}
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index 7e5a5c78aa6b58..d2d92fb864c310 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -38,7 +38,7 @@ static constexpr Builtin::Info BuiltinInfoX86[] = {
{#ID, TYPE, ATTRS, FEATURE, HeaderDesc::NO_HEADER, ALL_LANGUAGES},
#define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANGS, FEATURE)
\
{#ID, TYPE, ATTRS, FEATURE, HeaderDesc::HEADER, LANGS},
-#include "clang/Basic/BuiltinsX86_64.def"
+#include "clang/Basic/BuiltinsX86_64.inc"
};
static const char *const GCCRegNames[] = {
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