https://github.com/jhuber6 created https://github.com/llvm/llvm-project/pull/115241
Summary: The cache line size on AMDGPU varies between 64 and 128 (The lowest L2 cache also goes to 256 on some architectures.) This macro is intended to present a size that will not cause destructive interference, so we choose the larger of those values. >From 3feb2a194bd7e6078ad6e7618878411782828e12 Mon Sep 17 00:00:00 2001 From: Joseph Huber <hube...@outlook.com> Date: Wed, 6 Nov 2024 18:27:07 -0600 Subject: [PATCH] [AMDGPU] Make `__GCC_DESTRUCTIVE_SIZE` 128 on AMDGPU Summary: The cache line size on AMDGPU varies between 64 and 128 (The lowest L2 cache also goes to 256 on some architectures.) This macro is intended to present a size that will not cause destructive interference, so we choose the larger of those values. --- clang/lib/Basic/Targets/AMDGPU.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/clang/lib/Basic/Targets/AMDGPU.h b/clang/lib/Basic/Targets/AMDGPU.h index 6edd3474d4edae..81e96ed65c47bf 100644 --- a/clang/lib/Basic/Targets/AMDGPU.h +++ b/clang/lib/Basic/Targets/AMDGPU.h @@ -462,6 +462,10 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo { } bool hasHIPImageSupport() const override { return HasImage; } + + std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override { + return std::make_pair(128, 128); + } }; } // namespace targets _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits