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Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/107...@github.com>
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff ebf0599314e17c3ab89f303d452811b1db3e6d1e
9deeff4e9136c88813f26e83241328eb680938c6 --extensions h,c,cpp --
llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFObjectWriter.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFStreamer.cpp
clang/lib/Basic/Targets.cpp clang/lib/Basic/Targets/Mips.cpp
clang/lib/Basic/Targets/Mips.h clang/lib/CodeGen/CodeGenModule.cpp
clang/lib/CodeGen/TargetInfo.h clang/lib/CodeGen/Targets/Mips.cpp
clang/lib/Driver/ToolChains/MinGW.cpp clang/test/CodeGen/pragma-comment.c
clang/test/Preprocessor/predefined-win-macros.c lld/COFF/Config.h
llvm/include/llvm/BinaryFormat/COFF.h
llvm/include/llvm/Object/WindowsMachineFlag.h
llvm/include/llvm/ObjectYAML/COFFYAML.h
llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
llvm/lib/MC/WinCOFFObjectWriter.cpp llvm/lib/Object/COFFImportFile.cpp
llvm/lib/Object/COFFObjectFile.cpp llvm/lib/Object/WindowsMachineFlag.cpp
llvm/lib/Object/WindowsResource.cpp llvm/lib/ObjectYAML/COFFYAML.cpp
llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
llvm/lib/Target/Mips/MipsAsmPrinter.cpp
llvm/lib/Target/Mips/MipsISelLowering.cpp
llvm/lib/Target/Mips/MipsISelLowering.h
llvm/lib/Target/Mips/MipsMCInstLower.cpp
llvm/lib/Target/Mips/MipsRegisterInfo.cpp llvm/lib/Target/Mips/MipsSubtarget.h
llvm/lib/Target/Mips/MipsTargetMachine.cpp llvm/lib/TargetParser/Triple.cpp
llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
llvm/unittests/TargetParser/TripleTest.cpp
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/clang/lib/Basic/Targets/Mips.cpp b/clang/lib/Basic/Targets/Mips.cpp
index 858cdd1c6f..d56995e3cc 100644
--- a/clang/lib/Basic/Targets/Mips.cpp
+++ b/clang/lib/Basic/Targets/Mips.cpp
@@ -307,11 +307,10 @@ bool MipsTargetInfo::validateTarget(DiagnosticsEngine
&Diags) const {
WindowsMipsTargetInfo::WindowsMipsTargetInfo(const llvm::Triple &Triple,
const TargetOptions &Opts)
- : WindowsTargetInfo<MipsTargetInfo>(Triple, Opts), Triple(Triple) {
-}
+ : WindowsTargetInfo<MipsTargetInfo>(Triple, Opts), Triple(Triple) {}
-void WindowsMipsTargetInfo::getVisualStudioDefines(const LangOptions &Opts,
- MacroBuilder &Builder)
const {
+void WindowsMipsTargetInfo::getVisualStudioDefines(
+ const LangOptions &Opts, MacroBuilder &Builder) const {
Builder.defineMacro("_M_MRX000", "4000");
}
diff --git a/clang/lib/Basic/Targets/Mips.h b/clang/lib/Basic/Targets/Mips.h
index b138710bb8..f3bc0ee6d0 100644
--- a/clang/lib/Basic/Targets/Mips.h
+++ b/clang/lib/Basic/Targets/Mips.h
@@ -479,7 +479,8 @@ public:
};
// MIPS MinGW target
-class LLVM_LIBRARY_VISIBILITY MinGWMipsTargetInfo : public
WindowsMipsTargetInfo {
+class LLVM_LIBRARY_VISIBILITY MinGWMipsTargetInfo
+ : public WindowsMipsTargetInfo {
public:
MinGWMipsTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
diff --git a/clang/lib/CodeGen/Targets/Mips.cpp
b/clang/lib/CodeGen/Targets/Mips.cpp
index e7601564f6..771a85c84b 100644
--- a/clang/lib/CodeGen/Targets/Mips.cpp
+++ b/clang/lib/CodeGen/Targets/Mips.cpp
@@ -109,7 +109,7 @@ public:
class WindowsMIPSTargetCodeGenInfo : public MIPSTargetCodeGenInfo {
public:
WindowsMIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32)
- : MIPSTargetCodeGenInfo(CGT, IsO32) {}
+ : MIPSTargetCodeGenInfo(CGT, IsO32) {}
void getDependentLibraryOption(llvm::StringRef Lib,
llvm::SmallString<24> &Opt) const override {
@@ -117,8 +117,7 @@ public:
Opt += qualifyWindowsLibrary(Lib);
}
- void getDetectMismatchOption(llvm::StringRef Name,
- llvm::StringRef Value,
+ void getDetectMismatchOption(llvm::StringRef Name, llvm::StringRef Value,
llvm::SmallString<32> &Opt) const override {
Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\"";
}
diff --git a/llvm/include/llvm/ObjectYAML/COFFYAML.h
b/llvm/include/llvm/ObjectYAML/COFFYAML.h
index f7797fc7f6..c22d4e7f0b 100644
--- a/llvm/include/llvm/ObjectYAML/COFFYAML.h
+++ b/llvm/include/llvm/ObjectYAML/COFFYAML.h
@@ -179,8 +179,7 @@ struct ScalarEnumerationTraits<COFF::RelocationTypeAMD64> {
static void enumeration(IO &IO, COFF::RelocationTypeAMD64 &Value);
};
-template <>
-struct ScalarEnumerationTraits<COFF::RelocationTypesMips> {
+template <> struct ScalarEnumerationTraits<COFF::RelocationTypesMips> {
static void enumeration(IO &IO, COFF::RelocationTypesMips &Value);
};
diff --git a/llvm/lib/Object/COFFObjectFile.cpp
b/llvm/lib/Object/COFFObjectFile.cpp
index ad15d42135..f80a78d53a 100644
--- a/llvm/lib/Object/COFFObjectFile.cpp
+++ b/llvm/lib/Object/COFFObjectFile.cpp
@@ -1469,21 +1469,21 @@ StringRef
COFFObjectFile::getRelocationTypeName(uint16_t Type) const {
break;
case Triple::mipsel:
switch (Type) {
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_ABSOLUTE);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_REFHALF);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_REFWORD);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_JMPADDR);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_REFHI);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_REFLO);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_GPREL);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_LITERAL);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_SECTION);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_SECREL);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_SECRELLO);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_SECRELHI);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_JMPADDR16);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_REFWORDNB);
- LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_PAIR);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_ABSOLUTE);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_REFHALF);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_REFWORD);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_JMPADDR);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_REFHI);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_REFLO);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_GPREL);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_LITERAL);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_SECTION);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_SECREL);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_SECRELLO);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_SECRELHI);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_JMPADDR16);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_REFWORDNB);
+ LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_MIPS_PAIR);
default:
return "Unknown";
}
diff --git a/llvm/lib/Object/WindowsMachineFlag.cpp
b/llvm/lib/Object/WindowsMachineFlag.cpp
index bade2d4f0f..c9e950f753 100644
--- a/llvm/lib/Object/WindowsMachineFlag.cpp
+++ b/llvm/lib/Object/WindowsMachineFlag.cpp
@@ -28,7 +28,10 @@ COFF::MachineTypes llvm::getMachineType(StringRef S) {
.Case("arm64", COFF::IMAGE_FILE_MACHINE_ARM64)
.Case("arm64ec", COFF::IMAGE_FILE_MACHINE_ARM64EC)
.Case("arm64x", COFF::IMAGE_FILE_MACHINE_ARM64X)
- .Case("mips", COFF::IMAGE_FILE_MACHINE_R4000) // also handle mips
(big-endian) because we want to support '/machine:MIPS'
+ .Case("mips",
+ COFF::IMAGE_FILE_MACHINE_R4000) // also handle mips (big-endian)
+ // because we want to support
+ // '/machine:MIPS'
.Case("mipsel", COFF::IMAGE_FILE_MACHINE_R4000)
.Default(COFF::IMAGE_FILE_MACHINE_UNKNOWN);
}
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
index 16318cffd7..8acee578a5 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -603,8 +603,7 @@ class WindowsMipsAsmBackend : public MipsAsmBackend {
public:
WindowsMipsAsmBackend(const Target &T, const MCRegisterInfo &MRI,
const MCSubtargetInfo &STI)
- : MipsAsmBackend(T, MRI, STI.getTargetTriple(), STI.getCPU(), false) {
- }
+ : MipsAsmBackend(T, MRI, STI.getTargetTriple(), STI.getCPU(), false) {}
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
b/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
index b9a2af3341..11852681be 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
@@ -27,118 +27,118 @@ namespace llvm {
///
namespace MipsII {
/// Target Operand Flag enum.
- enum TOF {
-
//===------------------------------------------------------------------===//
- // Mips Specific MachineOperand flags.
-
- MO_NO_FLAG,
-
- /// MO_GOT - Represents the offset into the global offset table at which
- /// the address the relocation entry symbol resides during execution.
- MO_GOT,
-
- /// MO_GOT_CALL - Represents the offset into the global offset table at
- /// which the address of a call site relocation entry symbol resides
- /// during execution. This is different from the above since this flag
- /// can only be present in call instructions.
- MO_GOT_CALL,
-
- /// MO_GPREL - Represents the offset from the current gp value to be used
- /// for the relocatable object file being produced.
- MO_GPREL,
-
- /// MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol
- /// address.
- MO_ABS_HI,
- MO_ABS_LO,
-
- /// MO_TLSGD - Represents the offset into the global offset table at which
- // the module ID and TSL block offset reside during execution (General
- // Dynamic TLS).
- MO_TLSGD,
-
- /// MO_TLSLDM - Represents the offset into the global offset table at which
- // the module ID and TSL block offset reside during execution (Local
- // Dynamic TLS).
- MO_TLSLDM,
- MO_DTPREL_HI,
- MO_DTPREL_LO,
-
- /// MO_GOTTPREL - Represents the offset from the thread pointer (Initial
- // Exec TLS).
- MO_GOTTPREL,
-
- /// MO_TPREL_HI/LO - Represents the hi and low part of the offset from
- // the thread pointer (Local Exec TLS).
- MO_TPREL_HI,
- MO_TPREL_LO,
-
- // N32/64 Flags.
- MO_GPOFF_HI,
- MO_GPOFF_LO,
- MO_GOT_DISP,
- MO_GOT_PAGE,
- MO_GOT_OFST,
-
- /// MO_HIGHER/HIGHEST - Represents the highest or higher half word of a
- /// 64-bit symbol address.
- MO_HIGHER,
- MO_HIGHEST,
-
- /// MO_GOT_HI16/LO16, MO_CALL_HI16/LO16 - Relocations used for large GOTs.
- MO_GOT_HI16,
- MO_GOT_LO16,
- MO_CALL_HI16,
- MO_CALL_LO16,
-
- /// Helper operand used to generate R_MIPS_JALR
- MO_JALR,
-
- /// MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the
- /// reference is actually to the "__imp_FOO" symbol. This is used for
- /// dllimport linkage on windows.
- MO_DLLIMPORT = 0x20,
- };
-
- enum {
-
//===------------------------------------------------------------------===//
- // Instruction encodings. These are the standard/most common forms for
- // Mips instructions.
- //
-
- // Pseudo - This represents an instruction that is a pseudo instruction
- // or one that has not been implemented yet. It is illegal to code
generate
- // it, but tolerated for intermediate implementation stages.
- Pseudo = 0,
-
- /// FrmR - This form is for instructions of the format R.
- FrmR = 1,
- /// FrmI - This form is for instructions of the format I.
- FrmI = 2,
- /// FrmJ - This form is for instructions of the format J.
- FrmJ = 3,
- /// FrmFR - This form is for instructions of the format FR.
- FrmFR = 4,
- /// FrmFI - This form is for instructions of the format FI.
- FrmFI = 5,
- /// FrmOther - This form is for instructions that have no specific format.
- FrmOther = 6,
-
- FormMask = 15,
- /// IsCTI - Instruction is a Control Transfer Instruction.
- IsCTI = 1 << 4,
- /// HasForbiddenSlot - Instruction has a forbidden slot.
- HasForbiddenSlot = 1 << 5,
- /// HasFCCRegOperand - Instruction uses an $fcc<x> register.
- HasFCCRegOperand = 1 << 6
-
- };
-
- enum OperandType : unsigned {
- OPERAND_FIRST_MIPS_MEM_IMM = MCOI::OPERAND_FIRST_TARGET,
- OPERAND_MEM_SIMM9 = OPERAND_FIRST_MIPS_MEM_IMM,
- OPERAND_LAST_MIPS_MEM_IMM = OPERAND_MEM_SIMM9
- };
+enum TOF {
+ //===------------------------------------------------------------------===//
+ // Mips Specific MachineOperand flags.
+
+ MO_NO_FLAG,
+
+ /// MO_GOT - Represents the offset into the global offset table at which
+ /// the address the relocation entry symbol resides during execution.
+ MO_GOT,
+
+ /// MO_GOT_CALL - Represents the offset into the global offset table at
+ /// which the address of a call site relocation entry symbol resides
+ /// during execution. This is different from the above since this flag
+ /// can only be present in call instructions.
+ MO_GOT_CALL,
+
+ /// MO_GPREL - Represents the offset from the current gp value to be used
+ /// for the relocatable object file being produced.
+ MO_GPREL,
+
+ /// MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol
+ /// address.
+ MO_ABS_HI,
+ MO_ABS_LO,
+
+ /// MO_TLSGD - Represents the offset into the global offset table at which
+ // the module ID and TSL block offset reside during execution (General
+ // Dynamic TLS).
+ MO_TLSGD,
+
+ /// MO_TLSLDM - Represents the offset into the global offset table at which
+ // the module ID and TSL block offset reside during execution (Local
+ // Dynamic TLS).
+ MO_TLSLDM,
+ MO_DTPREL_HI,
+ MO_DTPREL_LO,
+
+ /// MO_GOTTPREL - Represents the offset from the thread pointer (Initial
+ // Exec TLS).
+ MO_GOTTPREL,
+
+ /// MO_TPREL_HI/LO - Represents the hi and low part of the offset from
+ // the thread pointer (Local Exec TLS).
+ MO_TPREL_HI,
+ MO_TPREL_LO,
+
+ // N32/64 Flags.
+ MO_GPOFF_HI,
+ MO_GPOFF_LO,
+ MO_GOT_DISP,
+ MO_GOT_PAGE,
+ MO_GOT_OFST,
+
+ /// MO_HIGHER/HIGHEST - Represents the highest or higher half word of a
+ /// 64-bit symbol address.
+ MO_HIGHER,
+ MO_HIGHEST,
+
+ /// MO_GOT_HI16/LO16, MO_CALL_HI16/LO16 - Relocations used for large GOTs.
+ MO_GOT_HI16,
+ MO_GOT_LO16,
+ MO_CALL_HI16,
+ MO_CALL_LO16,
+
+ /// Helper operand used to generate R_MIPS_JALR
+ MO_JALR,
+
+ /// MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the
+ /// reference is actually to the "__imp_FOO" symbol. This is used for
+ /// dllimport linkage on windows.
+ MO_DLLIMPORT = 0x20,
+};
+
+enum {
+ //===------------------------------------------------------------------===//
+ // Instruction encodings. These are the standard/most common forms for
+ // Mips instructions.
+ //
+
+ // Pseudo - This represents an instruction that is a pseudo instruction
+ // or one that has not been implemented yet. It is illegal to code generate
+ // it, but tolerated for intermediate implementation stages.
+ Pseudo = 0,
+
+ /// FrmR - This form is for instructions of the format R.
+ FrmR = 1,
+ /// FrmI - This form is for instructions of the format I.
+ FrmI = 2,
+ /// FrmJ - This form is for instructions of the format J.
+ FrmJ = 3,
+ /// FrmFR - This form is for instructions of the format FR.
+ FrmFR = 4,
+ /// FrmFI - This form is for instructions of the format FI.
+ FrmFI = 5,
+ /// FrmOther - This form is for instructions that have no specific format.
+ FrmOther = 6,
+
+ FormMask = 15,
+ /// IsCTI - Instruction is a Control Transfer Instruction.
+ IsCTI = 1 << 4,
+ /// HasForbiddenSlot - Instruction has a forbidden slot.
+ HasForbiddenSlot = 1 << 5,
+ /// HasFCCRegOperand - Instruction uses an $fcc<x> register.
+ HasFCCRegOperand = 1 << 6
+
+};
+
+enum OperandType : unsigned {
+ OPERAND_FIRST_MIPS_MEM_IMM = MCOI::OPERAND_FIRST_TARGET,
+ OPERAND_MEM_SIMM9 = OPERAND_FIRST_MIPS_MEM_IMM,
+ OPERAND_LAST_MIPS_MEM_IMM = OPERAND_MEM_SIMM9
+};
}
inline static MCRegister getMSARegFromFReg(MCRegister Reg) {
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
index 960256bc38..60567e2f1d 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
@@ -16,7 +16,7 @@
using namespace llvm;
-void MipsELFMCAsmInfo::anchor() { }
+void MipsELFMCAsmInfo::anchor() {}
MipsELFMCAsmInfo::MipsELFMCAsmInfo(const Triple &TheTriple,
const MCTargetOptions &Options) {
@@ -52,7 +52,7 @@ MipsELFMCAsmInfo::MipsELFMCAsmInfo(const Triple &TheTriple,
HasMipsExpressions = true;
}
-void MipsCOFFMCAsmInfoMicrosoft::anchor() { }
+void MipsCOFFMCAsmInfoMicrosoft::anchor() {}
MipsCOFFMCAsmInfoMicrosoft::MipsCOFFMCAsmInfoMicrosoft() {
WinEHEncodingType = WinEH::EncodingType::Itanium;
@@ -63,7 +63,7 @@ MipsCOFFMCAsmInfoMicrosoft::MipsCOFFMCAsmInfoMicrosoft() {
AllowAtInName = true;
}
-void MipsCOFFMCAsmInfoGNU::anchor() { }
+void MipsCOFFMCAsmInfoGNU::anchor() {}
MipsCOFFMCAsmInfoGNU::MipsCOFFMCAsmInfoGNU() {
HasSingleParameterDotFile = true;
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
index 114fec0ccc..f3e3e6e8d1 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
@@ -54,8 +54,7 @@ MCStreamer *createMipsWinCOFFStreamer(MCContext &C,
std::unique_ptr<MCObjectTargetWriter>
createMipsELFObjectWriter(const Triple &TT, bool IsN32);
/// Construct a Mips Win COFF object writer.
-std::unique_ptr<MCObjectTargetWriter>
-createMipsWinCOFFObjectWriter();
+std::unique_ptr<MCObjectTargetWriter> createMipsWinCOFFObjectWriter();
namespace MIPS_MC {
void initLLVMToCVRegMapping(MCRegisterInfo *MRI);
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFObjectWriter.cpp
b/llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFObjectWriter.cpp
index 17c21bc8b1..58a1a02874 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFObjectWriter.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFObjectWriter.cpp
@@ -1,4 +1,5 @@
-//===-- MipsWinCOFFObjectWriter.cpp - Mips Win COFF Writer
-----------------===//
+//===-- MipsWinCOFFObjectWriter.cpp - Mips Win COFF Writer
+//-----------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -56,7 +57,6 @@ unsigned MipsWinCOFFObjectWriter::getRelocType(MCContext &Ctx,
}
}
-std::unique_ptr<MCObjectTargetWriter>
-llvm::createMipsWinCOFFObjectWriter() {
+std::unique_ptr<MCObjectTargetWriter> llvm::createMipsWinCOFFObjectWriter() {
return std::make_unique<MipsWinCOFFObjectWriter>();
}
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFStreamer.cpp
b/llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFStreamer.cpp
index 77044a0ff3..47edddd29e 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFStreamer.cpp
@@ -25,9 +25,9 @@ public:
};
} // namespace
-MCStreamer *llvm::createMipsWinCOFFStreamer(MCContext &C,
- std::unique_ptr<MCAsmBackend> &&AB,
- std::unique_ptr<MCObjectWriter>
&&OW,
- std::unique_ptr<MCCodeEmitter>
&&CE) {
- return new MipsWinCOFFStreamer(C, std::move(AB), std::move(CE),
std::move(OW));
+MCStreamer *llvm::createMipsWinCOFFStreamer(
+ MCContext &C, std::unique_ptr<MCAsmBackend> &&AB,
+ std::unique_ptr<MCObjectWriter> &&OW, std::unique_ptr<MCCodeEmitter> &&CE)
{
+ return new MipsWinCOFFStreamer(C, std::move(AB), std::move(CE),
+ std::move(OW));
}
diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
index 89b79693a8..8a788f3aef 100644
--- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -756,7 +756,8 @@ void MipsAsmPrinter::emitStartOfAsmFile(Module &M) {
// for a feature string that doesn't match the default one.
StringRef CPU = MIPS_MC::selectMipsCPU(TT, TM.getTargetCPU());
const MipsTargetMachine &MTM = static_cast<const MipsTargetMachine &>(TM);
- const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM,
std::nullopt);
+ const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM,
+ std::nullopt);
bool IsABICalls = STI.isABICalls();
const MipsABIInfo &ABI = MTM.getABI();
@@ -778,16 +779,15 @@ void MipsAsmPrinter::emitStartOfAsmFile(Module &M) {
// NaN: At the moment we only support:
// 1. .nan legacy (default)
// 2. .nan 2008
- STI.isNaN2008() ? TS.emitDirectiveNaN2008()
- : TS.emitDirectiveNaNLegacy();
+ STI.isNaN2008() ? TS.emitDirectiveNaN2008() : TS.emitDirectiveNaNLegacy();
// TODO: handle O64 ABI
TS.updateABIInfo(STI);
- // We should always emit a '.module fp=...' but binutils 2.24 does not
accept
- // it. We therefore emit it when it contradicts the ABI defaults (-mfpxx or
- // -mfp64) and omit it otherwise.
+ // We should always emit a '.module fp=...' but binutils 2.24 does not
+ // accept it. We therefore emit it when it contradicts the ABI defaults
+ // (-mfpxx or -mfp64) and omit it otherwise.
if ((ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit())) ||
STI.useSoftFloat())
TS.emitDirectiveModuleFP();
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp
b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 94cadfffa8..c3c43e8f7e 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -2109,8 +2109,8 @@ SDValue MipsTargetLowering::lowerGlobalAddress(SDValue Op,
assert(Subtarget.isTargetWindows() &&
"Windows is the only supported COFF target");
return getDllimportVariable(
- N, SDLoc(N), Ty, DAG,
- DAG.getEntryNode(),
MachinePointerInfo::getGOT(DAG.getMachineFunction()));
+ N, SDLoc(N), Ty, DAG, DAG.getEntryNode(),
+ MachinePointerInfo::getGOT(DAG.getMachineFunction()));
}
if (!isPositionIndependent()) {
@@ -3468,12 +3468,13 @@
MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
}
if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
- if (Subtarget.isTargetCOFF() &&
G->getGlobal()->hasDLLImportStorageClass()) {
+ if (Subtarget.isTargetCOFF() &&
+ G->getGlobal()->hasDLLImportStorageClass()) {
assert(Subtarget.isTargetWindows() &&
"Windows is the only supported COFF target");
auto PtrInfo = MachinePointerInfo();
- Callee = DAG.getLoad(Ty, DL, Chain, getDllimportSymbol(G, SDLoc(G), Ty,
DAG),
- PtrInfo);
+ Callee = DAG.getLoad(Ty, DL, Chain,
+ getDllimportSymbol(G, SDLoc(G), Ty, DAG), PtrInfo);
} else if (IsPIC) {
const GlobalValue *Val = G->getGlobal();
InternalLinkage = Val->hasInternalLinkage();
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h
b/llvm/lib/Target/Mips/MipsISelLowering.h
index 12dfa6bc1c..52d2fc02fd 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.h
+++ b/llvm/lib/Target/Mips/MipsISelLowering.h
@@ -490,12 +490,14 @@ class TargetRegisterClass;
//
// (lw (add (shl(%high(sym), 16), %low(sym)))
template <class NodeTy>
- SDValue getDllimportSymbol(NodeTy *N, const SDLoc &DL, EVT Ty,
SelectionDAG &DAG) const {
- SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI |
MipsII::MO_DLLIMPORT);
- SDValue Lo = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_LO |
MipsII::MO_DLLIMPORT);
- return DAG.getNode(ISD::ADD, DL, Ty,
- DAG.getNode(MipsISD::Lo, DL, Ty, Lo),
- DAG.getNode(MipsISD::Hi, DL, Ty, Hi));
+ SDValue getDllimportSymbol(NodeTy *N, const SDLoc &DL, EVT Ty,
+ SelectionDAG &DAG) const {
+ SDValue Hi =
+ getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI | MipsII::MO_DLLIMPORT);
+ SDValue Lo =
+ getTargetNode(N, Ty, DAG, MipsII::MO_ABS_LO | MipsII::MO_DLLIMPORT);
+ return DAG.getNode(ISD::ADD, DL, Ty, DAG.getNode(MipsISD::Lo, DL, Ty,
Lo),
+ DAG.getNode(MipsISD::Hi, DL, Ty, Hi));
}
// This method creates the following nodes, which are necessary for
@@ -503,12 +505,11 @@ class TargetRegisterClass;
//
// (lw (lw (add (shl(%high(sym), 16), %low(sym))))
template <class NodeTy>
- SDValue getDllimportVariable(NodeTy *N, const SDLoc &DL, EVT Ty,
SelectionDAG &DAG,
- SDValue Chain,
+ SDValue getDllimportVariable(NodeTy *N, const SDLoc &DL, EVT Ty,
+ SelectionDAG &DAG, SDValue Chain,
const MachinePointerInfo &PtrInfo) const {
- return DAG.getLoad(Ty, DL, Chain,
- getDllimportSymbol(N, DL, Ty, DAG),
- PtrInfo);
+ return DAG.getLoad(Ty, DL, Chain, getDllimportSymbol(N, DL, Ty, DAG),
+ PtrInfo);
}
/// This function fills Ops, which is the list of operands that will later
diff --git a/llvm/lib/Target/Mips/MipsMCInstLower.cpp
b/llvm/lib/Target/Mips/MipsMCInstLower.cpp
index 667cf26b60..e01d0d1e65 100644
--- a/llvm/lib/Target/Mips/MipsMCInstLower.cpp
+++ b/llvm/lib/Target/Mips/MipsMCInstLower.cpp
@@ -48,7 +48,7 @@ MCOperand MipsMCInstLower::LowerSymbolOperand(const
MachineOperand &MO,
TargetFlags &= ~MipsII::MO_DLLIMPORT;
}
- switch(TargetFlags) {
+ switch (TargetFlags) {
default:
llvm_unreachable("Invalid target flag!");
case MipsII::MO_NO_FLAG:
diff --git a/llvm/unittests/TargetParser/TripleTest.cpp
b/llvm/unittests/TargetParser/TripleTest.cpp
index 1beb520889..18a8a52fe0 100644
--- a/llvm/unittests/TargetParser/TripleTest.cpp
+++ b/llvm/unittests/TargetParser/TripleTest.cpp
@@ -2303,8 +2303,10 @@ TEST(TripleTest, NormalizeWindows) {
EXPECT_TRUE(Triple("x86_64-pc-win32").isWindowsMSVCEnvironment());
-
EXPECT_TRUE(Triple(Triple::normalize("mipsel-windows-msvccoff")).isOSBinFormatCOFF());
-
EXPECT_TRUE(Triple(Triple::normalize("mipsel-windows-msvc")).isOSBinFormatCOFF());
+ EXPECT_TRUE(
+
Triple(Triple::normalize("mipsel-windows-msvccoff")).isOSBinFormatCOFF());
+ EXPECT_TRUE(
+ Triple(Triple::normalize("mipsel-windows-msvc")).isOSBinFormatCOFF());
}
TEST(TripleTest, NormalizeAndroid) {
``````````
</details>
https://github.com/llvm/llvm-project/pull/107744
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