peterwaller-arm wrote: > @peterwaller-arm I noticed that in > `llvm/test/CodeGen/AArch64/combine_andor_with_cmps.ll`, `FMAXNUM_IEEE` is > claimed that it is not supported. While I noticed that `fmaxnm` follows the > rules of `maxNUM` of IEEE754-2008. Is there any other limitation of `fmaxnm`?
This is not an area I know a great deal about and I'm about to go on leave, so I'm probably not the best person to ask. Perhaps the author of the comment (on https://reviews.llvm.org/D159240) @kmitropoulou can help? Could the comment mean that it's not currently supported by LLVM rather than not supported by the ISA? I see that the details of how NaNs are handled matters. I'm afraid I don't have time to get to the bottom of this currently. https://github.com/llvm/llvm-project/pull/93841 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
