[llvm] [clang] [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (PR #76777)

[Wang Pengcheng via cfe-commits]

================
@@ -985,9 +1003,10 @@ void 
RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF,
     };
 
     for (auto Reg : CSRegs)
-      SavedRegs.set(Reg);
+      if (Reg < RISCV::X16 || !Subtarget.isRVE())
----------------
wangpc-pp wrote:

Though it's nearly impossible to have such configuration in real application, I 
saved x15-x16 in 
https://github.com/llvm/llvm-project/pull/76777/commits/20ffba38548c823d6ef286bcad63385087438d57.

https://github.com/llvm/llvm-project/pull/76777
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