[clang] [RISCV] Implement shadow stack on shadow stack mode with Zicfiss. (PR #68075)

[Yeting Kuo via cfe-commits]

================
@@ -106,9 +111,14 @@ static void emitSCSEpilogue(MachineFunction &MF, 
MachineBasicBlock &MBB,
           CSI, [&](CalleeSavedInfo &CSR) { return CSR.getReg() == RAReg; }))
     return;
 
+  const RISCVInstrInfo *TII = STI.getInstrInfo();
+  if (STI.hasFeature(RISCV::FeatureStdExtZicfiss)) {
----------------
yetingk wrote:

> I think we could enable hardware shadow stack by a new option, like 
> -riscv-hardware-shadow-stack?
There is a commit 
https://github.com/llvm/llvm-project/pull/68075/commits/45c048c4013ea70e26d20eea6f2c481a7b5eae50
 for this 

https://github.com/llvm/llvm-project/pull/68075
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