================ @@ -420,20 +444,35 @@ bool ARM::appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, CPU = "generic"; if (ArchExt == "fp" || ArchExt == "fp.dp") { + const ARM::FPUKind DefaultFPU = getDefaultFPU(CPU, AK); ARM::FPUKind FPUKind; if (ArchExt == "fp.dp") { + const bool IsDP = ArgFPUKind != ARM::FK_INVALID && + ArgFPUKind != ARM::FK_NONE && + isDoublePrecision(getFPURestriction(ArgFPUKind)); ---------------- domin144 wrote:
The `appendArchExtFeatures` is called repeatedly in `DecodeARMFeatures`. There can be multiple FPU related extensions specified. e.g. `-march=armv8-m.main+nofp+fp+nofp.dp` should disable FPU, enable default FPU(fpv5-d16) and then switch to single precission equivalent FPU(fpv5-sp-d16). https://github.com/llvm/llvm-project/pull/67412 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits