https://github.com/CarolineConcatto created https://github.com/llvm/llvm-project/pull/65593:
The new ACLE PR#225[1] now combines the slice parameters for some builtins. This patch is the #3 of 3 patches to update the interface. [1]https://github.com/ARM-software/acle/pull/225/files >From 64d078afd04f82db0fe9aff76d3c9a3892c091f5 Mon Sep 17 00:00:00 2001 From: Caroline Concatto <caroline.conca...@arm.com> Date: Thu, 7 Sep 2023 10:04:47 +0000 Subject: [PATCH] [AArch64][SME]Update intrinsic interface for ldr/str The new ACLE PR#225[1] now combines the slice parameters for some builtins. This patch is the #3 of 3 patches to update the interface. [1]https://github.com/ARM-software/acle/pull/225/files --- clang/include/clang/Basic/arm_sme.td | 16 +++++++++--- clang/lib/CodeGen/CGBuiltin.cpp | 25 +++++++++++-------- .../aarch64-sme-intrinsics/acle_sme_ldr.c | 13 ++++++++-- .../aarch64-sme-intrinsics/acle_sme_str.c | 14 +++++++++-- .../aarch64-sme-intrinsics/acle_sme_imm.cpp | 8 +++--- 5 files changed, 54 insertions(+), 22 deletions(-) diff --git a/clang/include/clang/Basic/arm_sme.td b/clang/include/clang/Basic/arm_sme.td index f747ccde38a3a15..0eb1e647bf03eaa 100644 --- a/clang/include/clang/Basic/arm_sme.td +++ b/clang/include/clang/Basic/arm_sme.td @@ -44,10 +44,14 @@ defm SVLD1_ZA32 : ZALoad<"za32", "i", "aarch64_sme_ld1w", [ImmCheck<0, ImmCheck0 defm SVLD1_ZA64 : ZALoad<"za64", "l", "aarch64_sme_ld1d", [ImmCheck<0, ImmCheck0_7>, ImmCheck<2, ImmCheck0_1>]>; defm SVLD1_ZA128 : ZALoad<"za128", "q", "aarch64_sme_ld1q", [ImmCheck<0, ImmCheck0_15>, ImmCheck<2, ImmCheck0_0>]>; -def SVLDR_VNUM_ZA : MInst<"svldr_vnum_za", "vmiQ", "", +def SVLDR_VNUM_ZA : MInst<"svldr_vnum_za", "vmQi", "", [IsOverloadNone, IsStreamingCompatible, IsSharedZA], MemEltTyDefault, "aarch64_sme_ldr", - [ImmCheck<1, ImmCheck0_15>]>; + [ImmCheck<2, ImmCheck0_15>]>; + +def SVLDR_ZA : MInst<"svldr_za", "vmQ", "", + [IsOverloadNone, IsStreamingCompatible, IsSharedZA], + MemEltTyDefault, "aarch64_sme_ldr", []>; //////////////////////////////////////////////////////////////////////////////// // Stores @@ -78,10 +82,14 @@ defm SVST1_ZA32 : ZAStore<"za32", "i", "aarch64_sme_st1w", [ImmCheck<0, ImmCheck defm SVST1_ZA64 : ZAStore<"za64", "l", "aarch64_sme_st1d", [ImmCheck<0, ImmCheck0_7>, ImmCheck<2, ImmCheck0_1>]>; defm SVST1_ZA128 : ZAStore<"za128", "q", "aarch64_sme_st1q", [ImmCheck<0, ImmCheck0_15>, ImmCheck<2, ImmCheck0_0>]>; -def SVSTR_VNUM_ZA : MInst<"svstr_vnum_za", "vmi%", "", +def SVSTR_VNUM_ZA : MInst<"svstr_vnum_za", "vm%i", "", [IsOverloadNone, IsStreamingCompatible, IsSharedZA, IsPreservesZA], MemEltTyDefault, "aarch64_sme_str", - [ImmCheck<1, ImmCheck0_15>]>; + [ImmCheck<2, ImmCheck0_15>]>; + +def SVSTR_ZA : MInst<"svstr_za", "vm%", "", + [IsOverloadNone, IsStreamingCompatible, IsSharedZA, IsPreservesZA], + MemEltTyDefault, "aarch64_sme_str", []>; //////////////////////////////////////////////////////////////////////////////// // Read horizontal/vertical ZA slices diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index a513eae46e358e5..582148fc108bec6 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -9576,15 +9576,18 @@ Value *CodeGenFunction::EmitSMEZero(const SVETypeFlags &TypeFlags, Value *CodeGenFunction::EmitSMELdrStr(const SVETypeFlags &TypeFlags, SmallVectorImpl<Value *> &Ops, unsigned IntID) { - Function *Cntsb = CGM.getIntrinsic(Intrinsic::aarch64_sme_cntsb); - llvm::Value *CntsbCall = Builder.CreateCall(Cntsb, {}, "svlb"); - llvm::Value *MulVL = Builder.CreateMul( - CntsbCall, - Builder.getInt64(cast<llvm::ConstantInt>(Ops[1])->getZExtValue()), - "mulvl"); - Ops[2] = Builder.CreateGEP(Int8Ty, Ops[2], MulVL); - Ops[0] = EmitTileslice(Ops[1], Ops[0]); - Ops.erase(&Ops[1]); + if (Ops.size() == 3) { + Function *Cntsb = CGM.getIntrinsic(Intrinsic::aarch64_sme_cntsb); + llvm::Value *CntsbCall = Builder.CreateCall(Cntsb, {}, "svlb"); + llvm::Value *MulVL = Builder.CreateMul( + CntsbCall, + Builder.getInt64(cast<llvm::ConstantInt>(Ops[2])->getZExtValue()), + "mulvl"); + + Ops[1] = Builder.CreateGEP(Int8Ty, Ops[1], MulVL); + Ops[0] = EmitTileslice(Ops[0], Ops[2]); + Ops.erase(&Ops[2]); + } Function *F = CGM.getIntrinsic(IntID, {}); return Builder.CreateCall(F, Ops); } @@ -10054,7 +10057,9 @@ Value *CodeGenFunction::EmitAArch64SMEBuiltinExpr(unsigned BuiltinID, BuiltinID == SME::BI__builtin_sme_svzero_za) return EmitSMEZero(TypeFlags, Ops, Builtin->LLVMIntrinsic); else if (BuiltinID == SME::BI__builtin_sme_svldr_vnum_za || - BuiltinID == SME::BI__builtin_sme_svstr_vnum_za) + BuiltinID == SME::BI__builtin_sme_svstr_vnum_za || + BuiltinID == SME::BI__builtin_sme_svldr_za || + BuiltinID == SME::BI__builtin_sme_svstr_za) return EmitSMELdrStr(TypeFlags, Ops, Builtin->LLVMIntrinsic); else if (Builtin->LLVMIntrinsic != 0) { // Predicates must match the main datatype. diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c index 7efa8b1556857cf..acddc2ef50a3ddf 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c @@ -12,7 +12,7 @@ // CHECK-NEXT: ret void // void test_svldr_vnum_za(uint32_t slice_base, const void *ptr) { - svldr_vnum_za(slice_base, 0, ptr); + svldr_vnum_za(slice_base, ptr, 0); } // CHECK-C-LABEL: @test_svldr_vnum_za_1( @@ -26,5 +26,14 @@ void test_svldr_vnum_za(uint32_t slice_base, const void *ptr) { // CHECK-NEXT: ret void // void test_svldr_vnum_za_1(uint32_t slice_base, const void *ptr) { - svldr_vnum_za(slice_base, 15, ptr); + svldr_vnum_za(slice_base, ptr, 15); +} + +// CHECK-C-LABEL: @test_svldr_za( +// CHECK-CXX-LABEL: @_Z13test_svldr_zajPKv( +// CHECK-NEXT: entry: +// CHECK-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) +// CHECK-NEXT: ret void +void test_svldr_za(uint32_t slice_base, const void *ptr) { + svldr_za(slice_base, ptr); } diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c index 12aa298858a18eb..2728f9ac0cd12d3 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c @@ -12,7 +12,7 @@ // CHECK-NEXT: ret void // void test_svstr_vnum_za(uint32_t slice_base, void *ptr) { - svstr_vnum_za(slice_base, 0, ptr); + svstr_vnum_za(slice_base, ptr, 0); } // CHECK-C-LABEL: @test_svstr_vnum_za_1( @@ -26,5 +26,15 @@ void test_svstr_vnum_za(uint32_t slice_base, void *ptr) { // CHECK-NEXT: ret void // void test_svstr_vnum_za_1(uint32_t slice_base, void *ptr) { - svstr_vnum_za(slice_base, 15, ptr); + svstr_vnum_za(slice_base, ptr, 15); +} + +// CHECK-C-LABEL: @test_svstr_za( +// CHECK-CXX-LABEL: @_Z13test_svstr_zajPv( +// CHECK-NEXT: entry: +// CHECK-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) +// CHECK-NEXT: ret void +// +void test_svstr_za(uint32_t slice_base, void *ptr) { + svstr_za(slice_base, ptr); } diff --git a/clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp b/clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp index 175694f147a3f80..71ea785f58bdc3a 100644 --- a/clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp +++ b/clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp @@ -216,9 +216,9 @@ void test_range_0_15(svbool_t pg, void *ptr) { SVE_ACLE_FUNC(svst1_ver_vnum_za8,,,)(0, -1, 16, pg, ptr, 1); // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} - SVE_ACLE_FUNC(svldr_vnum_za,,,)(-1, 16, ptr); + SVE_ACLE_FUNC(svldr_vnum_za,,,)(-1, ptr, 16); // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} - SVE_ACLE_FUNC(svstr_vnum_za,,,)(-1, -1, ptr); + SVE_ACLE_FUNC(svstr_vnum_za,,,)(-1, ptr, -1); // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svread_hor_za128, _s8, _m,)(svundef_s8(), pg, -1, -1, 0); @@ -255,8 +255,8 @@ void test_constant(uint64_t u64, svbool_t pg, void *ptr) { SVE_ACLE_FUNC(svst1_hor_vnum_za32,,,)(u64, u64, 0, pg, ptr, u64); // expected-error {{argument to 'svst1_hor_vnum_za32' must be a constant integer}} SVE_ACLE_FUNC(svst1_ver_vnum_za64,,,)(0, u64, u64, pg, ptr, u64); // expected-error {{argument to 'svst1_ver_vnum_za64' must be a constant integer}} - SVE_ACLE_FUNC(svldr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svldr_vnum_za' must be a constant integer}} - SVE_ACLE_FUNC(svstr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svstr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(u64, ptr, u64); // expected-error {{argument to 'svldr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(u64, ptr, u64); // expected-error {{argument to 'svstr_vnum_za' must be a constant integer}} SVE_ACLE_FUNC(svread_hor_za8, _s8, _m,)(svundef_s8(), pg, 0, u64, u64); // expected-error-re {{argument to 'svread_hor_za8{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svread_ver_za16, _s16, _m,)(svundef_s16(), pg, u64, u64, 0); // expected-error-re {{argument to 'svread_ver_za16{{.*}}_m' must be a constant integer}} _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
