rengolin added inline comments. ================ Comment at: src/UnwindRegistersRestore.S:325 @@ -324,4 +324,3 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm20restoreCoreAndJumpToEv) -#if !defined(__ARM_ARCH_ISA_ARM) - ldr r2, [r0, #52] - ldr r3, [r0, #60] +#if !defined(__ARM_ARCH_ISA_ARM) && __ARM_ARCH_ISA_THUMB == 1 + @ r8-r12: ldr into r1-r5, then mov to r8-r12 ---------------- bcraig wrote: > weimingz wrote: > > originally, r8-r12 were not restored. Was that some existing bug? > I'm not sure why r12 is getting messed with here. It is intended as a > GOT/PLT scratch register. r8+ isn't ubiquitously available in Thumb state > according to the ATPCS. The AAPCS says that r4-r8, r10, r11, and SP must be > preserved. r9 can optionally be preserved. So, you're replacing a Thumb2+ARM implementation with a Thumb1+ARM one. This is all fine and dandy, but a Thumb2 implementation would be much smaller and cleaner (thus also faster).
Maybe we should have three implementations? https://reviews.llvm.org/D22292 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
