rsandifo-arm added inline comments.
================ Comment at: clang/docs/ReleaseNotes.rst:503 +- Targeting AArch64, since D127209 LLVM now only preserves the z8-z23 + and p4-p15 registers across a call if the registers z0-z7 or p0-p4 are + used to pass data into or out of a subroutine. The new behavior ---------------- Should be p0-p3 rather than p0-p4. LGTM with that change. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D129135/new/ https://reviews.llvm.org/D129135 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
