rsandifo-arm added inline comments.
================ Comment at: clang/docs/ReleaseNotes.rst:503 +- Targeting AArch64, LLVM now only preserves the z8-z23 registers across + a call if the registers z0-z7 are used to pass data into or out of a + subroutine. This new behavior now matches the AAPCS. Previously LLVM ---------------- Pedantically, I think it should be “the registers z0-z7 or p0-p3”. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D129135/new/ https://reviews.llvm.org/D129135 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
