void added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64RegisterInfo.td:1398
+ (sequence "W%u", 0, 7))>;
+def FPR8_ARG : RegisterClass<"AArch64", [untyped], 8, (trunc FPR8, 7)> {
+ let Size = 8;
----------------
sdesmalen wrote:
> Should this feature/attribute work with other calling conventions? If so,
> then it's probably best not to hard-code these values here, but rather to get
> them from the chosen calling convention for that particular function. The
> supported calling conventions are defined in AArch64CallingConvention.td.
>
> For example, you could iterate all registers in GPR64/FPR128/ZPR/PPR register
> classes and zero their values if they are not marked as callee saved. You can
> query this information from the call by looking at it's callee-saved regmask
> (see for example `CSR_AArch64_AAPCS_RegMask` to see how those are defined
> defined).
Ideally it could be retrieved from the `*CallingConvention.td` files, but in
reality it's difficult because those files have a lot of `CCIf...<>` constructs
in them, making a simple query complex.
I don't know about the `*_RegMask` thing. Could you explain what it is and how
it works?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D124836/new/
https://reviews.llvm.org/D124836
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