nickdesaulniers added inline comments.
================ Comment at: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp:776-778 + // For GPRs, we only care to clear out the 64-bit register. + if (MCRegister XReg = getRegisterOrZero(Reg)) + GPRsToZero.set(XReg); ---------------- nickdesaulniers wrote: > so for 32b registers, we clear the whole 64b register? Perhaps a more descriptive method name like `getWidestRegisterAlias` or the like? Perhaps we should simply assert if we get a non GPR rather than return 0, which might actually be a Register? Also, TargetRegisterClass has some notion of sub and super register classes. I wonder if have existing machinery to say, given a register class, what's the equivalent/aliases super register class (if that's even what a super register is). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124836/new/ https://reviews.llvm.org/D124836 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
