craig.topper added inline comments.
================
Comment at: llvm/include/llvm/Support/RISCVISAInfo.h:91
void updateMinVLen();
+ void updateMaxEew();
};
----------------
There's no definition for this
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:821
-let Predicates = [HasStdExtV, IsRV64] in {
- // Vector Indexed Instructions
----------------
Is this deletion correct? I don't see where the VLUXEI64 instructions are
declared now.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:871
+
+def : InstAlias<"vl1r.v $vd, (${rs1})", (VL1RE8_V VR:$vd, GPR:$rs1)>;
+def : InstAlias<"vl2r.v $vd, (${rs1})", (VL2RE8_V VRM2:$vd, GPR:$rs1)>;
----------------
Why is there no Predicate on these aliases?
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:1509
-let Predicates = [HasStdExtZvlsseg, IsRV64] in {
+let Predicates = [HasStdExtZvlsseg, HasVInstructionsI64] in {
foreach nf=2-8 in {
----------------
These require RV64 don't they?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D112408/new/
https://reviews.llvm.org/D112408
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