craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVSubtarget.h:141
+ // either v or zve* suppaort v instructions
+ bool hasStdExtV() const { return HasStdExtV || HasStdExtZve32x; }
+ bool hasStdExtZve32x() const { return HasStdExtZve32x; }
----------------
frasercrmck wrote:
> eopXD wrote:
> > craig.topper wrote:
> > > frasercrmck wrote:
> > > > Is this correct? I thought we'd keep `hasStdExtV` as being the
> > > > single-letter V extension, and Zve32x isn't that.
> > > I just put up D112496 to stop using hasStdExtV everywhere.
> > Thank you @craig.topper for the patch.
> > LGTM, and we can have it landed after this series on `zvl`, `zve` patch are
> > done.
> Ah right now I see what this was trying to do. I think your patch helps
> things, thanks.
I'd like to land my patch first and make this patch change hasVInstructions*()
in the appropriate ways. If we don't do my patch first then this patch will
enable i64 vectors with Zve32x which would be incorrect.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D112408/new/
https://reviews.llvm.org/D112408
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