lei updated this revision to Diff 370349.
lei added a comment.
fix spelling in commit message.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D109178/new/
https://reviews.llvm.org/D109178
Files:
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/lib/Headers/altivec.h
clang/lib/Sema/DeclSpec.cpp
clang/test/CodeGen/builtins-ppc-int128.c
clang/test/CodeGen/builtins-ppc-vsx.c
clang/test/Parser/altivec-bool-128.c
clang/test/Parser/altivec.c
clang/test/Parser/cxx-altivec-bool-128.cpp
clang/test/Parser/cxx-altivec.cpp
clang/test/Sema/altivec-generic-overload.c
clang/test/Sema/builtins-ppc.c
Index: clang/test/Sema/builtins-ppc.c
===================================================================
--- clang/test/Sema/builtins-ppc.c
+++ clang/test/Sema/builtins-ppc.c
@@ -6,6 +6,9 @@
// RUN: %clang_cc1 -target-feature +altivec -target-feature +crypto \
// RUN: -triple powerpc64le-unknown-unknown -DTEST_CRYPTO -fsyntax-only \
// RUN: -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +crypto \
+// RUN: -triple powerpc64le-unknown-unknown -DTEST_CRYPTO -fsyntax-only \
+// RUN: -target-feature +vsx -verify %s
#ifdef TEST_HTM
void test_htm() {
@@ -37,6 +40,7 @@
return __builtin_crypto_vshasigmaw(a, 1, 15);
}
+#ifdef __VSX__
vector unsigned long long test_vshasigmad_or(void)
{
vector unsigned long long a = D_INIT
@@ -46,6 +50,7 @@
vector unsigned long long e = __builtin_crypto_vshasigmad(a, 1, -15); // expected-error-re {{argument value {{.*}} is outside the valid range}}
return __builtin_crypto_vshasigmad(a, 0, 15);
}
+#endif
#endif
Index: clang/test/Sema/altivec-generic-overload.c
===================================================================
--- clang/test/Sema/altivec-generic-overload.c
+++ clang/test/Sema/altivec-generic-overload.c
@@ -1,4 +1,8 @@
-// RUN: %clang_cc1 %s -triple=powerpc64le-unknown-linux -target-feature +altivec -target-feature +vsx -verify -verify-ignore-unexpected=note -pedantic -fsyntax-only
+// RUN: %clang_cc1 %s -triple=powerpc64le-unknown-linux -target-feature +altivec \
+// RUN: -target-feature +vsx -verify -verify-ignore-unexpected=note -pedantic -fsyntax-only
+// RUN: %clang_cc1 %s -triple=powerpc64le-unknown-linux -target-feature +altivec \
+// RUN: -target-feature +vsx -verify -verify-ignore-unexpected=note -pedantic -fsyntax-only \
+// RUN: -target-cpu pwr8
typedef signed char __v16sc __attribute__((__vector_size__(16)));
typedef unsigned char __v16uc __attribute__((__vector_size__(16)));
@@ -20,9 +24,6 @@
__v4si *__attribute__((__overloadable__)) convert1(vector signed int);
__v4ui *__attribute__((__overloadable__)) convert1(vector unsigned int);
__v2sll *__attribute__((__overloadable__)) convert1(vector signed long long);
-__v2ull *__attribute__((__overloadable__)) convert1(vector unsigned long long);
-__v1slll *__attribute__((__overloadable__)) convert1(vector signed __int128);
-__v1ulll *__attribute__((__overloadable__)) convert1(vector unsigned __int128);
__v4f *__attribute__((__overloadable__)) convert1(vector float);
__v2d *__attribute__((__overloadable__)) convert1(vector double);
void __attribute__((__overloadable__)) convert1(vector bool int);
@@ -36,11 +37,17 @@
vector unsigned int *__attribute__((__overloadable__)) convert2(__v4ui);
vector signed long long *__attribute__((__overloadable__)) convert2(__v2sll);
vector unsigned long long *__attribute__((__overloadable__)) convert2(__v2ull);
-vector signed __int128 *__attribute__((__overloadable__)) convert2(__v1slll);
-vector unsigned __int128 *__attribute__((__overloadable__)) convert2(__v1ulll);
vector float *__attribute__((__overloadable__)) convert2(__v4f);
vector double *__attribute__((__overloadable__)) convert2(__v2d);
+#ifdef __POWER8_VECTOR__
+__v1slll *__attribute__((__overloadable__)) convert1(vector signed __int128);
+__v1ulll *__attribute__((__overloadable__)) convert1(vector unsigned __int128);
+__v2ull *__attribute__((__overloadable__)) convert1(vector unsigned long long);
+vector signed __int128 *__attribute__((__overloadable__)) convert2(__v1slll);
+vector unsigned __int128 *__attribute__((__overloadable__)) convert2(__v1ulll);
+#endif
+
void test() {
__v16sc gv1;
__v16uc gv2;
@@ -49,11 +56,14 @@
__v4si gv5;
__v4ui gv6;
__v2sll gv7;
+ __v4f gv11;
+ __v2d gv12;
+
+#ifdef __POWER8_VECTOR__
__v2ull gv8;
__v1slll gv9;
__v1ulll gv10;
- __v4f gv11;
- __v2d gv12;
+#endif
vector signed char av1;
vector unsigned char av2;
@@ -63,8 +73,10 @@
vector unsigned int av6;
vector signed long long av7;
vector unsigned long long av8;
+#ifdef __POWER8_VECTOR__
vector signed __int128 av9;
vector unsigned __int128 av10;
+#endif
vector float av11;
vector double av12;
vector bool int av13;
@@ -77,9 +89,11 @@
__v4si *gv5_p = convert1(gv5);
__v4ui *gv6_p = convert1(gv6);
__v2sll *gv7_p = convert1(gv7);
+#ifdef __POWER8_VECTOR__
__v2ull *gv8_p = convert1(gv8);
__v1slll *gv9_p = convert1(gv9);
__v1ulll *gv10_p = convert1(gv10);
+#endif
__v4f *gv11_p = convert1(gv11);
__v2d *gv12_p = convert1(gv12);
@@ -91,8 +105,10 @@
vector unsigned int *av6_p = convert2(av6);
vector signed long long *av7_p = convert2(av7);
vector unsigned long long *av8_p = convert2(av8);
+#ifdef __POWER8_VECTOR__
vector signed __int128 *av9_p = convert2(av9);
vector unsigned __int128 *av10_p = convert2(av10);
+#endif
vector float *av11_p = convert2(av11);
vector double *av12_p = convert2(av12);
convert2(av13); // expected-error {{call to 'convert2' is ambiguous}}
Index: clang/test/Parser/cxx-altivec.cpp
===================================================================
--- clang/test/Parser/cxx-altivec.cpp
+++ clang/test/Parser/cxx-altivec.cpp
@@ -1,6 +1,7 @@
// RUN: %clang_cc1 -triple=powerpc-apple-darwin8 -target-feature +altivec -fsyntax-only -verify=expected,nonaix -std=c++11 %s
// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +altivec -fsyntax-only -verify=expected,nonaix -std=c++11 %s
// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-feature +altivec -fsyntax-only -verify=expected,nonaix -std=c++11 %s
+// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-feature +vsx -target-cpu pwr7 -fsyntax-only -verify=expected,nonaix -std=c++11 %s
// RUN: %clang_cc1 -triple=powerpc-ibm-aix -target-feature +altivec -fsyntax-only -verify=expected,aix -std=c++11 %s
// RUN: %clang_cc1 -triple=powerpc64-ibm-aix -target-feature +altivec -fsyntax-only -verify=expected,aix -std=c++11 %s
#include <altivec.h>
@@ -87,13 +88,15 @@
__vector long double vv_ld; // expected-error {{cannot use 'long double' with '__vector'}}
vector long double v_ld; // expected-error {{cannot use 'long double' with '__vector'}}
-// These should have errors.
+#ifndef __VSX__
+// These should have errors for non pwr7 vsx builds.
__vector double vv_d1; // expected-error {{use of 'double' with '__vector' requires VSX support to be enabled (available on POWER7 or later)}}
vector double v_d2; // expected-error {{use of 'double' with '__vector' requires VSX support to be enabled (available on POWER7 or later)}}
-__vector bool long long v_bll1; // expected-error {{use of 'long long' with '__vector bool' requires VSX support (available on POWER7 or later) or extended Altivec support (available on POWER8 or later) to be enabled}}
-__vector __bool long long v_bll2; // expected-error {{use of 'long long' with '__vector bool' requires VSX support (available on POWER7 or later) or extended Altivec support (available on POWER8 or later) to be enabled}}
-vector bool long long v_bll3; // expected-error {{use of 'long long' with '__vector bool' requires VSX support (available on POWER7 or later) or extended Altivec support (available on POWER8 or later) to be enabled}}
-vector __bool long long v_bll4; // expected-error {{use of 'long long' with '__vector bool' requires VSX support (available on POWER7 or later) or extended Altivec support (available on POWER8 or later) to be enabled}}
+__vector bool long long v_bll1; // expected-error {{use of 'long long' with '__vector' requires VSX support (available on POWER7 or later) to be enabled}}
+__vector __bool long long v_bll2; // expected-error {{use of 'long long' with '__vector' requires VSX support (available on POWER7 or later) to be enabled}}
+vector bool long long v_bll3; // expected-error {{use of 'long long' with '__vector' requires VSX support (available on POWER7 or later) to be enabled}}
+vector __bool long long v_bll4; // expected-error {{use of 'long long' with '__vector' requires VSX support (available on POWER7 or later) to be enabled}}
+#endif
__vector long double vv_ld3; // expected-error {{cannot use 'long double' with '__vector'}}
vector long double v_ld4; // expected-error {{cannot use 'long double' with '__vector'}}
vector bool v_b; // expected-error {{C++ requires a type specifier for all declarations}}
@@ -110,10 +113,12 @@
vector __bool unsigned int v___bsc2; // expected-error {{cannot use 'unsigned' with '__vector bool'}}
vector __bool long v___bl; // expected-error {{cannot use 'long' with '__vector bool'}}
+#ifdef __VSX__
// vector long is deprecated, but vector long long is not.
vector long long v_ll;
vector signed long long v_sll;
vector unsigned long long v_ull;
+#endif
void f() {
__vector unsigned int v = {0,0,0,0};
Index: clang/test/Parser/cxx-altivec-bool-128.cpp
===================================================================
--- clang/test/Parser/cxx-altivec-bool-128.cpp
+++ clang/test/Parser/cxx-altivec-bool-128.cpp
@@ -3,7 +3,7 @@
// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu \
// RUN: -target-feature +altivec -fsyntax-only -verify -std=c++11 %s
// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-cpu pwr10 \
-// RUN: -target-feature +altivec -target-feature +vsx \
+// RUN: -target-feature +altivec -target-feature -vsx \
// RUN: -target-feature -power10-vector -fsyntax-only -verify %s
#include <altivec.h>
@@ -11,13 +11,13 @@
// Test 'vector bool __int128' type.
// These should have errors.
-__vector bool __int128 v1_bi128; // expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
-__vector __bool __int128 v2_bi128; // expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
-vector bool __int128 v3_bi128; // expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
-vector __bool __int128 v4_bi128; // expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
-__vector bool unsigned __int128 v5_bi128; // expected-error {{cannot use 'unsigned' with '__vector bool'}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
-__vector bool signed __int128 v6_bi128; // expected-error {{cannot use 'signed' with '__vector bool'}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
-vector bool unsigned __int128 v7_bi128; // expected-error {{cannot use 'unsigned' with '__vector bool'}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
-vector bool signed __int128 v8_bi128; // expected-error {{cannot use 'signed' with '__vector bool'}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
-__vector __bool signed __int128 v9_bi128; // expected-error {{cannot use 'signed' with '__vector bool'}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
-vector __bool signed __int128 v10_bi128; // expected-error {{cannot use 'signed' with '__vector bool'}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
+__vector bool __int128 v1_bi128; // expected-error {{use of '__int128' with '__vector' requires extended Altivec support (available on POWER8 or later)}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
+__vector __bool __int128 v2_bi128; // expected-error {{use of '__int128' with '__vector' requires extended Altivec support (available on POWER8 or later)}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
+vector bool __int128 v3_bi128; // expected-error {{use of '__int128' with '__vector' requires extended Altivec support (available on POWER8 or later)}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
+vector __bool __int128 v4_bi128; // expected-error {{use of '__int128' with '__vector' requires extended Altivec support (available on POWER8 or later)}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
+__vector bool unsigned __int128 v5_bi128; // expected-error {{cannot use 'unsigned' with '__vector bool'}} expected-error {{use of '__int128' with '__vector' requires extended Altivec support (available on POWER8 or later)}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
+__vector bool signed __int128 v6_bi128; // expected-error {{cannot use 'signed' with '__vector bool'}} expected-error {{use of '__int128' with '__vector' requires extended Altivec support (available on POWER8 or later)}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
+vector bool unsigned __int128 v7_bi128; // expected-error {{cannot use 'unsigned' with '__vector bool'}} expected-error {{use of '__int128' with '__vector' requires extended Altivec support (available on POWER8 or later)}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
+vector bool signed __int128 v8_bi128; // expected-error {{cannot use 'signed' with '__vector bool'}} expected-error {{use of '__int128' with '__vector' requires extended Altivec support (available on POWER8 or later)}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
+__vector __bool signed __int128 v9_bi128; // expected-error {{cannot use 'signed' with '__vector bool'}} expected-error {{use of '__int128' with '__vector' requires extended Altivec support (available on POWER8 or later)}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
+vector __bool signed __int128 v10_bi128; // expected-error {{cannot use 'signed' with '__vector bool'}} expected-error {{use of '__int128' with '__vector' requires extended Altivec support (available on POWER8 or later)}} expected-error {{use of '__int128' with '__vector bool' requires VSX support enabled (on POWER10 or later)}}
Index: clang/test/Parser/altivec.c
===================================================================
--- clang/test/Parser/altivec.c
+++ clang/test/Parser/altivec.c
@@ -1,8 +1,8 @@
// RUN: %clang_cc1 -triple=powerpc-apple-darwin8 -target-feature +altivec -fsyntax-only -verify=expected,nonaix %s
// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +altivec -fsyntax-only -verify=expected,nonaix %s
-// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-feature +altivec -fsyntax-only -verify=expected,nonaix %s
+// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-feature +altivec -target-feature +vsx -fsyntax-only -verify=expected,nonaix %s
// RUN: %clang_cc1 -triple=powerpc-ibm-aix -target-feature +altivec -fsyntax-only -verify=expected,aix %s
-// RUN: %clang_cc1 -triple=powerpc64-ibm-aix -target-feature +altivec -fsyntax-only -verify=expected,aix %s
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix -target-feature +altivec -target-feature +vsx -fsyntax-only -verify=expected,aix %s
__vector char vv_c;
__vector signed char vv_sc;
@@ -89,12 +89,14 @@
vector __bool v___b; // expected-warning {{type specifier missing, defaults to 'int'}}
// These should have errors.
+#ifndef __VSX__
__vector double vv_d1; // expected-error {{use of 'double' with '__vector' requires VSX support to be enabled (available on POWER7 or later)}}
vector double v_d2; // expected-error {{use of 'double' with '__vector' requires VSX support to be enabled (available on POWER7 or later)}}
-__vector bool long long v_bll1; // expected-error {{use of 'long long' with '__vector bool' requires VSX support (available on POWER7 or later) or extended Altivec support (available on POWER8 or later) to be enabled}}
-__vector __bool long long v_bll2; // expected-error {{use of 'long long' with '__vector bool' requires VSX support (available on POWER7 or later) or extended Altivec support (available on POWER8 or later) to be enabled}}
-vector bool long long v_bll3; // expected-error {{use of 'long long' with '__vector bool' requires VSX support (available on POWER7 or later) or extended Altivec support (available on POWER8 or later) to be enabled}}
-vector __bool long long v_bll4; // expected-error {{use of 'long long' with '__vector bool' requires VSX support (available on POWER7 or later) or extended Altivec support (available on POWER8 or later) to be enabled}}
+__vector bool long long v_bll1; // expected-error {{use of 'long long' with '__vector' requires VSX support (available on POWER7 or later) to be enabled}}
+__vector __bool long long v_bll2; // expected-error {{use of 'long long' with '__vector' requires VSX support (available on POWER7 or later) to be enabled}}
+vector bool long long v_bll3; // expected-error {{use of 'long long' with '__vector' requires VSX support (available on POWER7 or later) to be enabled}}
+vector __bool long long v_bll4; // expected-error {{use of 'long long' with '__vector' requires VSX support (available on POWER7 or later) to be enabled}}
+#endif
__vector long double vv_ld3; // expected-error {{cannot use 'long double' with '__vector'}}
vector long double v_ld4; // expected-error {{cannot use 'long double' with '__vector'}}
vector bool float v_bf; // expected-error {{cannot use 'float' with '__vector bool'}}
@@ -110,10 +112,12 @@
vector __bool unsigned int v___bsc2; // expected-error {{cannot use 'unsigned' with '__vector bool'}}
vector __bool long v___bl; // expected-error {{cannot use 'long' with '__vector bool'}}
+#ifdef __VSX__
// vector long is deprecated, but vector long long is not.
vector long long v_ll;
vector signed long long v_sll;
vector unsigned long long v_ull;
+#endif
typedef char i8;
typedef short i16;
Index: clang/test/Parser/altivec-bool-128.c
===================================================================
--- clang/test/Parser/altivec-bool-128.c
+++ clang/test/Parser/altivec-bool-128.c
@@ -1,6 +1,6 @@
-// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu \
+// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-cpu pwr8\
// RUN: -target-feature +altivec -fsyntax-only -verify %s
-// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu \
+// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-cpu pwr8\
// RUN: -target-feature +altivec -fsyntax-only -verify %s
// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-cpu pwr10 \
// RUN: -target-feature +vsx -target-feature -power10-vector \
Index: clang/test/CodeGen/builtins-ppc-vsx.c
===================================================================
--- clang/test/CodeGen/builtins-ppc-vsx.c
+++ clang/test/CodeGen/builtins-ppc-vsx.c
@@ -50,7 +50,6 @@
vector bool long long res_vbll;
vector signed long long res_vsll;
vector unsigned long long res_vull;
-vector signed __int128 res_vslll;
double res_d;
int res_i;
@@ -2224,34 +2223,6 @@
// CHECK-NEXT-LE: bitcast <4 x i32> %{{[0-9]+}} to <2 x double>
}
-void testVectorInt128Pack(){
-// CHECK-LABEL: testVectorInt128Pack
-// CHECK-LABEL-LE: testVectorInt128Pack
- res_vslll = __builtin_pack_vector_int128(aull[0], aull[1]);
-// CHECK: %[[V1:[0-9]+]] = insertelement <2 x i64> undef, i64 %{{[0-9]+}}, i64 0
-// CHECK-NEXT: %[[V2:[0-9]+]] = insertelement <2 x i64> %[[V1]], i64 %{{[0-9]+}}, i64 1
-// CHECK-NEXT: bitcast <2 x i64> %[[V2]] to <1 x i128>
-
-// CHECK-LE: %[[V1:[0-9]+]] = insertelement <2 x i64> undef, i64 %{{[0-9]+}}, i64 1
-// CHECK-NEXT-LE: %[[V2:[0-9]+]] = insertelement <2 x i64> %[[V1]], i64 %{{[0-9]+}}, i64 0
-// CHECK-NEXT-LE: bitcast <2 x i64> %[[V2]] to <1 x i128>
-
- __builtin_unpack_vector_int128(res_vslll, 0);
-// CHECK: %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
-// CHECK-NEXT: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 0
-
-// CHECK-LE: %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
-// CHECK-NEXT-LE: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 1
-
- __builtin_unpack_vector_int128(res_vslll, 1);
-// CHECK: %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
-// CHECK-NEXT: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 1
-
-// CHECK-LE: %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
-// CHECK-NEXT-LE: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 0
-
-}
-
void test_vector_cpsgn_float(vector float a, vector float b) {
// CHECK-LABEL: test_vector_cpsgn_float
// CHECK-DAG: load{{.*}}%__a
Index: clang/test/CodeGen/builtins-ppc-int128.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/builtins-ppc-int128.c
@@ -0,0 +1,39 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
+// RUN: -triple powerpc64-unknown-unknown -target-cpu pwr8 \
+// RUN: -emit-llvm %s -o - -U__XL_COMPAT_ALTIVEC__ | FileCheck %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
+// RUN: -triple powerpc64le-unknown-unknown -target-cpu pwr8 \
+// RUN: -emit-llvm %s -o - -U__XL_COMPAT_ALTIVEC__ | FileCheck %s -check-prefix=CHECK-LE
+#include <altivec.h>
+
+vector signed __int128 res_vslll;
+unsigned long long aull[2] = { 1L, 2L };
+
+void testVectorInt128Pack(){
+// CHECK-LABEL: testVectorInt128Pack
+// CHECK-LABEL-LE: testVectorInt128Pack
+ res_vslll = __builtin_pack_vector_int128(aull[0], aull[1]);
+// CHECK: %[[V1:[0-9]+]] = insertelement <2 x i64> undef, i64 %{{[0-9]+}}, i64 0
+// CHECK-NEXT: %[[V2:[0-9]+]] = insertelement <2 x i64> %[[V1]], i64 %{{[0-9]+}}, i64 1
+// CHECK-NEXT: bitcast <2 x i64> %[[V2]] to <1 x i128>
+
+// CHECK-LE: %[[V1:[0-9]+]] = insertelement <2 x i64> undef, i64 %{{[0-9]+}}, i64 1
+// CHECK-NEXT-LE: %[[V2:[0-9]+]] = insertelement <2 x i64> %[[V1]], i64 %{{[0-9]+}}, i64 0
+// CHECK-NEXT-LE: bitcast <2 x i64> %[[V2]] to <1 x i128>
+
+ __builtin_unpack_vector_int128(res_vslll, 0);
+// CHECK: %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
+// CHECK-NEXT: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 0
+
+// CHECK-LE: %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
+// CHECK-NEXT-LE: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 1
+
+ __builtin_unpack_vector_int128(res_vslll, 1);
+// CHECK: %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
+// CHECK-NEXT: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 1
+
+// CHECK-LE: %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
+// CHECK-NEXT-LE: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 0
+}
+
Index: clang/lib/Sema/DeclSpec.cpp
===================================================================
--- clang/lib/Sema/DeclSpec.cpp
+++ clang/lib/Sema/DeclSpec.cpp
@@ -1154,6 +1154,17 @@
// Validate and finalize AltiVec vector declspec.
if (TypeAltiVecVector) {
+ // No vector long long without VSX (or ZVector).
+ if ((getTypeSpecWidth() == TypeSpecifierWidth::LongLong) &&
+ !S.Context.getTargetInfo().hasFeature("vsx") &&
+ !S.getLangOpts().ZVector)
+ S.Diag(TSTLoc, diag::err_invalid_vector_long_long_decl_spec);
+
+ // No vector __int128 prior to Power8.
+ if ((TypeSpecType == TST_int128) &&
+ (!S.Context.getTargetInfo().hasFeature("power8-vector")))
+ S.Diag(TSTLoc, diag::err_invalid_vector_int128_decl_spec);
+
if (TypeAltiVecBool) {
// Sign specifiers are not allowed with vector bool. (PIM 2.1)
if (getTypeSpecSign() != TypeSpecifierSign::Unspecified) {
@@ -1182,13 +1193,6 @@
S.Diag(TSWRange.getBegin(), diag::err_invalid_vector_bool_decl_spec)
<< getSpecifierName(getTypeSpecWidth());
- // vector bool long long requires VSX support or ZVector.
- if ((getTypeSpecWidth() == TypeSpecifierWidth::LongLong) &&
- (!S.Context.getTargetInfo().hasFeature("vsx")) &&
- (!S.Context.getTargetInfo().hasFeature("power8-vector")) &&
- !S.getLangOpts().ZVector)
- S.Diag(TSTLoc, diag::err_invalid_vector_long_long_decl_spec);
-
// Elements of vector bool are interpreted as unsigned. (PIM 2.1)
if ((TypeSpecType == TST_char) || (TypeSpecType == TST_int) ||
(TypeSpecType == TST_int128) ||
Index: clang/lib/Headers/altivec.h
===================================================================
--- clang/lib/Headers/altivec.h
+++ clang/lib/Headers/altivec.h
@@ -8832,7 +8832,7 @@
vec_sl(vector long long __a, vector unsigned long long __b) {
return (vector long long)vec_sl((vector unsigned long long)__a, __b);
}
-#else
+#elif defined(__VSX__)
static __inline__ vector unsigned char __ATTRS_o_ai
vec_vspltb(vector unsigned char __a, unsigned char __b);
static __inline__ vector unsigned long long __ATTRS_o_ai
@@ -10343,7 +10343,7 @@
vec_sr(vector long long __a, vector unsigned long long __b) {
return (vector long long)vec_sr((vector unsigned long long)__a, __b);
}
-#else
+#elif defined(__VSX__)
static __inline__ vector unsigned long long __ATTRS_o_ai
vec_sr(vector unsigned long long __a, vector unsigned long long __b) {
__b %= (vector unsigned long long)(sizeof(unsigned long long) * __CHAR_BIT__);
@@ -10473,7 +10473,7 @@
vec_sra(vector unsigned long long __a, vector unsigned long long __b) {
return (vector unsigned long long)((vector signed long long)__a >> __b);
}
-#else
+#elif defined(__VSX__)
static __inline__ vector signed long long __ATTRS_o_ai
vec_sra(vector signed long long __a, vector unsigned long long __b) {
__b %= (vector unsigned long long)(sizeof(unsigned long long) * __CHAR_BIT__);
@@ -17196,6 +17196,7 @@
#define vec_ncipher_be __builtin_altivec_crypto_vncipher
#define vec_ncipherlast_be __builtin_altivec_crypto_vncipherlast
+#ifdef __VSX__
static __inline__ vector unsigned long long __attribute__((__always_inline__))
__builtin_crypto_vsbox(vector unsigned long long __a) {
return __builtin_altivec_crypto_vsbox(__a);
@@ -17224,6 +17225,7 @@
vector unsigned long long __b) {
return __builtin_altivec_crypto_vncipherlast(__a, __b);
}
+#endif
#define __builtin_crypto_vshasigmad __builtin_altivec_crypto_vshasigmad
#define __builtin_crypto_vshasigmaw __builtin_altivec_crypto_vshasigmaw
Index: clang/include/clang/Basic/DiagnosticSemaKinds.td
===================================================================
--- clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -267,10 +267,12 @@
def err_invalid_vector_bool_int128_decl_spec : Error <
"use of '__int128' with '__vector bool' requires VSX support enabled (on "
"POWER10 or later)">;
+def err_invalid_vector_int128_decl_spec : Error<
+ "use of '__int128' with '__vector' requires extended Altivec support"
+ " (available on POWER8 or later)">;
def err_invalid_vector_long_long_decl_spec : Error <
- "use of 'long long' with '__vector bool' requires VSX support (available on "
- "POWER7 or later) or extended Altivec support (available on POWER8 or later) "
- "to be enabled">;
+ "use of 'long long' with '__vector' requires VSX support (available on "
+ "POWER7 or later) to be enabled">;
def err_invalid_vector_long_double_decl_spec : Error<
"cannot use 'long double' with '__vector'">;
def warn_vector_long_decl_spec_combination : Warning<
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