nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.
LGTM aside from a very minor nit.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:4990
case ISD::INTRINSIC_WO_CHAIN: {
+ // We emit the ppc_fsels intrinsic here because of type conflicts with the
+ // comparison operand. The FSELS instruction is defined to use an 8-byte
----------------
s/ppc_fels intrinsic/PPC::FSELS instruction
since we aren't emitting an intrinsic, we are consuming it and emitting the
instruction (well a `MachineSDNode`, but it represents an instruction).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D103986/new/
https://reviews.llvm.org/D103986
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