qiucf added inline comments.
================
Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-sync.c:2
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
-// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
+// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
----------------
Why change `pwr7` to `pwr8`?
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:3324
+def : Pat<(int_ppc_fsqrts f4rc:$frB), (FSQRTS $frB)>;
+
let hasSideEffects = 0 in {
----------------
Seems we didn't exploit `XXSEL` in this case. But for sqrt/rsqrt, PPC has VSX
and non-VSX versions for them:
```
frsqrte - xsrsqrtedp
frsqrtes - xsrsqrtesp
fsqrt - xssqrtdp
fsqrts - xssqrtsp
```
So needs to add `frsqrte` here and `xsrsqrtesp/xssqrtsp` in VSX part?
================
Comment at: llvm/test/CodeGen/builtins-ppc-xlcompat-fp.ll:9
+; RUN: -ppc-asm-full-reg-names -mcpu=pwr7 < %s | FileCheck %s
+
+define dso_local double @test_fsel(double %a, double %b, double %c)
local_unnamed_addr #0 {
----------------
You can use `update_llc_test` script to automatically update this file.
And add non-vsx test?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D103986/new/
https://reviews.llvm.org/D103986
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