LuoYuanke added inline comments.
================ Comment at: llvm/lib/Target/X86/X86TileConfig.cpp:101 + unsigned SubIdx = (BitSize == 8) ? X86::sub_8bit : X86::sub_16bit; + unsigned Opc = (BitSize == 8) ? X86::MOV8mr : X86::MOV16mr; + MachineInstr *NewMI = ---------------- LuoYuanke wrote: > LuoYuanke wrote: > > akashk4 wrote: > > > I do not understand why wasn't PSTTILECFG used to store config to memory. > > > I guess it will be difficult to do that because we do not know the scope > > > of a transaction since the TILE_RELEASE is not supported. > > PSTTILECFG is use to store the config from tile config register to memory. > > Here to need to load the config from memory to tile config register, so > > that each tile data register is configured. > > > > The LDTIELCFG has been inserted in the X86PreTileConfig pass. Since at > > X86PreTileConfig pass we don't know the config of the tile physical > > registers, the shape data in stack slot is zero. At the pass which is after > > RA, we know the shape of tile registers, so we just fill in the shape in > > the stack slot. > > > > Do you mean to tile release at the end of each function which use AMX? > > Since we config tile registers at the beginning of each function that use > > AMX, it doesn't break AMX operation without tile release. But it may reduce > > the overhead of thread switch with tile release, if AMX operation in only > > used for a while in a thread. > I add tilerelease in function's epilog if the function define AMX registers. @akashk4, ping Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
