pengfei added a comment.
You may still need to change the format according to the Lint suggestions.
================
Comment at: clang/lib/Headers/amxintrin.h:227
+
+/// This is new intrinsic interface
+typedef int _tile_data __attribute__((__vector_size__(1024), __aligned__(64)));
----------------
The comment is useless.
================
Comment at: clang/lib/Headers/amxintrin.h:243
+_tile_stored_internal(unsigned short m, unsigned short n, void *base,
+ int stride, _tile_data tile) {
+ return __builtin_ia32_tilestored64_internal(m, n, base,
----------------
The type is inconsistent with `__tile_stored`
================
Comment at: clang/lib/Headers/amxintrin.h:255
+__DEFAULT_FN_ATTRS_INT8
+void __tile_loadd(__tile *dst, const void *base, long long stride) {
+ dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
----------------
Why not use `size_t`?
================
Comment at: clang/lib/Headers/amxintrin.h:266
+__DEFAULT_FN_ATTRS_INT8
+void __tile_stored(void *base, long long stride, __tile src) {
+ _tile_stored_internal(src.row, src.col, base, stride, src.tile);
----------------
The same here.
================
Comment at: clang/test/CodeGen/X86/amx_api.c:13
+ //CHECK-LABEL: @test_api
+ //CHECK: call <256 x i32> @llvm.x86.tileloadd64.internal
+ //CHECK: call <256 x i32> @llvm.x86.tdpbssd.internal
----------------
Shoud it check for 3 and only 3 `llvm.x86.tileloadd64.internal`?
================
Comment at: llvm/include/llvm/CodeGen/Passes.h:494
+
+ FunctionPass *createX86LowerAMXTypePass();
} // End llvm namespace
----------------
Comments?
================
Comment at: llvm/include/llvm/CodeGen/TileShapeInfo.h:47
+ return true;
+ if ((RowImm != InvalidImmShape) && (Shape.getRowImm() != InvalidImmShape)
&&
+ (ColImm != InvalidImmShape) && (Shape.getColImm() != InvalidImmShape))
{
----------------
You just need to check
`RowImm != InvalidImmShape && ColImm != InvalidImmShape`
================
Comment at: llvm/lib/Target/X86/X86TileConfig.cpp:117
+ FrameIdx, Offset)
+ .addImm(Imm);
+}
----------------
The format looks strange, I wonder why Lint didn't report it.
================
Comment at: llvm/test/CodeGen/X86/ipra-reg-usage.ll:6
define preserve_allcc void @foo()#0 {
-; CHECK: foo Clobbered Registers: $cs $df $ds $eflags $eip $eiz $es $fpcw
$fpsw $fs $gs $hip $ip $mxcsr $rip $riz $ss $ssp $bnd0 $bnd1 $bnd2 $bnd3 $cr0
$cr1 $cr2 $cr3 $cr4 $cr5 $cr6 $cr7 $cr8 $cr9 $cr10 $cr11 $cr12 $cr13 $cr14
$cr15 $dr0 $dr1 $dr2 $dr3 $dr4 $dr5 $dr6 $dr7 $dr8 $dr9 $dr10 $dr11 $dr12 $dr13
$dr14 $dr15 $fp0 $fp1 $fp2 $fp3 $fp4 $fp5 $fp6 $fp7 $k0 $k1 $k2 $k3 $k4 $k5 $k6
$k7 $mm0 $mm1 $mm2 $mm3 $mm4 $mm5 $mm6 $mm7 $r11 $st0 $st1 $st2 $st3 $st4 $st5
$st6 $st7 $tmm0 $tmm1 $tmm2 $tmm3 $tmm4 $tmm5 $tmm6 $tmm7 $xmm16 $xmm17 $xmm18
$xmm19 $xmm20 $xmm21 $xmm22 $xmm23 $xmm24 $xmm25 $xmm26 $xmm27 $xmm28 $xmm29
$xmm30 $xmm31 $ymm0 $ymm1 $ymm2 $ymm3 $ymm4 $ymm5 $ymm6 $ymm7 $ymm8 $ymm9
$ymm10 $ymm11 $ymm12 $ymm13 $ymm14 $ymm15 $ymm16 $ymm17 $ymm18 $ymm19 $ymm20
$ymm21 $ymm22 $ymm23 $ymm24 $ymm25 $ymm26 $ymm27 $ymm28 $ymm29 $ymm30 $ymm31
$zmm0 $zmm1 $zmm2 $zmm3 $zmm4 $zmm5 $zmm6 $zmm7 $zmm8 $zmm9 $zmm10 $zmm11
$zmm12 $zmm13 $zmm14 $zmm15 $zmm16 $zmm17 $zmm18 $zmm19 $zmm20 $zmm21 $zmm22
$zmm23 $zmm24 $zmm25 $zmm26 $zmm27 $zmm28 $zmm29 $zmm30 $zmm31 $r11b $r11bh
$r11d $r11w $r11wh
+; CHECK: foo Clobbered Registers: $cs $df $ds $eflags $eip $eiz $es $fpcw
$fpsw $fs $gs $hip $ip $mxcsr $rip $riz $ss $ssp $tmmcfg $bnd0 $bnd1 $bnd2
$bnd3 $cr0 $cr1 $cr2 $cr3 $cr4 $cr5 $cr6 $cr7 $cr8 $cr9 $cr10 $cr11 $cr12 $cr13
$cr14 $cr15 $dr0 $dr1 $dr2 $dr3 $dr4 $dr5 $dr6 $dr7 $dr8 $dr9 $dr10 $dr11 $dr12
$dr13 $dr14 $dr15 $fp0 $fp1 $fp2 $fp3 $fp4 $fp5 $fp6 $fp7 $k0 $k1 $k2 $k3 $k4
$k5 $k6 $k7 $mm0 $mm1 $mm2 $mm3 $mm4 $mm5 $mm6 $mm7 $r11 $st0 $st1 $st2 $st3
$st4 $st5 $st6 $st7 $tmm0 $tmm1 $tmm2 $tmm3 $tmm4 $tmm5 $tmm6 $tmm7 $xmm16
$xmm17 $xmm18 $xmm19 $xmm20 $xmm21 $xmm22 $xmm23 $xmm24 $xmm25 $xmm26 $xmm27
$xmm28 $xmm29 $xmm30 $xmm31 $ymm0 $ymm1 $ymm2 $ymm3 $ymm4 $ymm5 $ymm6 $ymm7
$ymm8 $ymm9 $ymm10 $ymm11 $ymm12 $ymm13 $ymm14 $ymm15 $ymm16 $ymm17 $ymm18
$ymm19 $ymm20 $ymm21 $ymm22 $ymm23 $ymm24 $ymm25 $ymm26 $ymm27 $ymm28 $ymm29
$ymm30 $ymm31 $zmm0 $zmm1 $zmm2 $zmm3 $zmm4 $zmm5 $zmm6 $zmm7 $zmm8 $zmm9
$zmm10 $zmm11 $zmm12 $zmm13 $zmm14 $zmm15 $zmm16 $zmm17 $zmm18 $zmm19 $zmm20
$zmm21 $zmm22 $zmm23 $zmm24 $zmm25 $zmm26 $zmm27 $zmm28 $zmm29 $zmm30 $zmm31
$r11b $r11bh $r11d $r11w $r11wh $k0_k1 $k2_k3 $k4_k5 $k6_k7
call void @bar1()
----------------
LuoYuanke wrote:
> LuoYuanke wrote:
> > pengfei wrote:
> > > Why this patch affects the k registers?
> > This looks wired to me too. The patch only add "tmmcfg". I'll look into it
> > later.
> I check the test case without my patch the k pair registers are clobbered.
> But FileCheck only match the strings, so the test passes. I can also remove
> "$k0_k1 $k2_k3 $k4_k5 $k6_k7" from the checking.
>
> $ llc -enable-ipra -print-regusage test/CodeGen/X86/ipra-reg-usage.ll
> foo Clobbered Registers: $cs $df $ds $eflags $eip $eiz $es $fpcw $fpsw $fs
> $gs $hip $ip $mxcsr $rip $riz $ss $ssp $bnd0 $bnd1 $bnd2 $bnd3 $cr0 $cr1 $cr2
> $cr3 $cr4 $cr5 $cr6
> $cr7 $cr8 $cr9 $cr10 $cr11 $cr12 $cr13 $cr14 $cr15 $dr0 $dr1 $dr2 $dr3 $dr4
> $dr5 $dr6 $dr7 $dr8 $dr9 $dr10 $dr11 $dr12 $dr13 $dr14 $dr15 $fp0 $fp1 $fp2
> $fp3 $fp4 $fp5 $fp6 $fp7 $k0 $k1 $k2 $k3 $k4 $k5 $k6 $k7 $mm0 $mm1 $mm2 $mm3
> $mm4 $mm5 $mm6 $mm7 $r11 $st0 $st1 $st2 $st3 $st4 $st5 $st6 $st7 $tmm0 $tmm1
> $tmm2 $tmm3 $tmm4 $tmm5 $tmm6 $tmm7 $xmm16 $xmm17 $xmm18 $xmm19 $xmm20 $xmm21
> $xmm22 $xmm23 $xmm24 $xmm25 $xmm26 $xmm27 $xmm28 $xmm29 $xmm30 $xmm31 $ymm0
> $ymm1 $ymm2 $ymm3 $ymm4 $ymm5 $ymm6 $ymm7 $ymm8 $ymm9 $ymm10 $ymm11 $ymm12
> $ymm13 $ymm14 $ymm15 $ymm16 $ymm17 $ymm18 $ymm19 $ymm20 $ymm21 $ymm22 $ymm23
> $ymm24 $ymm25 $ymm26 $ymm27 $ymm28 $ymm29 $ymm30 $ymm31 $zmm0 $zmm1 $zmm2
> $zmm3
> $zmm4 $zmm5 $zmm6 $zmm7 $zmm8 $zmm9 $zmm10 $zmm11 $zmm12 $zmm13 $zmm14 $zmm15
> $zmm16 $zmm17 $zmm18 $zmm19 $zmm20 $zmm21 $zmm22 $zmm23 $zmm24 $zmm25 $zmm26
> $zmm27 $zmm28 $zmm29 $zmm30 $zmm31 $r11b $r11bh $r11d $r11w $r11wh $k0_k1
> $k2_k3 $k4_k5 $k6_k7
>
You can commit a patch to fix it directly.
================
Comment at: llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir:94
; CHECK: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def
dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- ; CHECK: STATEPOINT 0, 0, 1, @some_call, $rdi, 2, 0, 2, 0, 2, 5, 2, 0, 2,
-1, 2, 0, 2, 0, 2, 0, 2, 2, 1, 8, %stack.0, 0, 1, 8, %stack.1, 0, 2, 0, 2, 2,
0, 0, 1, 1, csr_64, implicit-def $rsp, implicit-def $ssp :: (load store 8 on
%stack.1), (load store 8 on %stack.0)
+ ; CHECK: STATEPOINT 0, 0, 1, @some_call, $rdi, 2, 0, 2, 0, 2, 5, 2, 0, 2,
-1, 2, 0, 2, 0, 2, 0, 2, 2, 1, 8, %stack.0, 0, 1, 8, %stack.1, 0, 2, 0, 2, 2,
0, 0, 1, 1, csr_64, implicit-def $rsp, implicit-def $ssp :: (load store 8 on
%stack.0), (load store 8 on %stack.1)
; CHECK-DAG: $r14 = MOV64rm %stack.0, 1, $noreg, 0, $noreg :: (load 8 from
%stack.0)
----------------
Is the different caused by the order change of MachineDominator Tree
Construction?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D87981/new/
https://reviews.llvm.org/D87981
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