amyk requested changes to this revision.
amyk added a comment.
This revision now requires changes to proceed.
A question I have is, is it possible for the 128-bit vector modulo instructions
be open coded?
================
Comment at: clang/lib/Headers/altivec.h:17394
+static __inline__ vector signed __int128 __ATTRS_o_ai
+vec_mod(vector signed __int128 __a, vector signed __int128 __b) {
+ return __builtin_altivec_vmodsq(__a, __b);
----------------
nit: Move these under the existing `vec_mod` builtins.
Also, is it possible for these to be open coded instead? We have `vec_mod` for
other types that are open coded.
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:1300
+ [(set v1i128:$vD, (int_ppc_altivec_vmodsq
v1i128:$vA,
+ v1i128:$vB))]>;
def VMODUQ : VXForm_1<1547, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
----------------
nit: Indent `v1i128` underneath the top `v1i128`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D87394/new/
https://reviews.llvm.org/D87394
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
