This revision was automatically updated to reflect the committed changes.
Closed by commit rGe5b877275673: [utils] change default nameless value to
"TMP" (authored by spatel).
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
Changed prior to commit:
https://reviews.llvm.org/D80584?vs=267500&id=267582#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D80584/new/
https://reviews.llvm.org/D80584
Files:
clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.expected
clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected
llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll
llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll.expected
llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll.funcsig.expected
llvm/utils/UpdateTestChecks/common.py
Index: llvm/utils/UpdateTestChecks/common.py
===================================================================
--- llvm/utils/UpdateTestChecks/common.py
+++ llvm/utils/UpdateTestChecks/common.py
@@ -218,7 +218,7 @@
# spaces, commas, paren, or end of the string
IR_VALUE_RE = re.compile(r'(\s+)%([\w.-]+?)([,\s\(\)]|\Z)')
-NAMELESS_PREFIX = "NAMELESS"
+NAMELESS_PREFIX = "TMP"
# Create a FileCheck variable name based on an IR name.
def get_value_name(var):
Index: llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll.funcsig.expected
===================================================================
--- llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll.funcsig.expected
+++ llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll.funcsig.expected
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature
-; Example input for update_llc_test_checks (taken from test/Transforms/InstSimplify/add.ll)
+; Example input for update_test_checks (taken from test/Transforms/InstSimplify/add.ll)
; RUN: opt < %s -instsimplify -S | FileCheck %s
define i32 @common_sub_operand(i32 %X, i32 %Y) {
@@ -53,3 +53,13 @@
%r = add <2 x i8> %yx, %xy
ret <2 x i8> %r
}
+
+define i32 @nameless_value(i32 %X) {
+; CHECK-LABEL: define {{[^@]+}}@nameless_value
+; CHECK-SAME: (i32 [[X:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 42, [[X]]
+; CHECK-NEXT: ret i32 [[TMP1]]
+;
+ %1 = sub i32 42, %X
+ ret i32 %1
+}
Index: llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll.expected
===================================================================
--- llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll.expected
+++ llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll.expected
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; Example input for update_llc_test_checks (taken from test/Transforms/InstSimplify/add.ll)
+; Example input for update_test_checks (taken from test/Transforms/InstSimplify/add.ll)
; RUN: opt < %s -instsimplify -S | FileCheck %s
define i32 @common_sub_operand(i32 %X, i32 %Y) {
@@ -48,3 +48,12 @@
%r = add <2 x i8> %yx, %xy
ret <2 x i8> %r
}
+
+define i32 @nameless_value(i32 %X) {
+; CHECK-LABEL: @nameless_value(
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 42, [[X:%.*]]
+; CHECK-NEXT: ret i32 [[TMP1]]
+;
+ %1 = sub i32 42, %X
+ ret i32 %1
+}
Index: llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll
===================================================================
--- llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll
+++ llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/basic.ll
@@ -1,4 +1,4 @@
-; Example input for update_llc_test_checks (taken from test/Transforms/InstSimplify/add.ll)
+; Example input for update_test_checks (taken from test/Transforms/InstSimplify/add.ll)
; RUN: opt < %s -instsimplify -S | FileCheck %s
define i32 @common_sub_operand(i32 %X, i32 %Y) {
@@ -47,3 +47,12 @@
%r = add <2 x i8> %yx, %xy
ret <2 x i8> %r
}
+
+define i32 @nameless_value(i32 %X) {
+; CHECK-LABEL: @nameless_value(
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 42, [[X:%.*]]
+; CHECK-NEXT: ret i32 [[TMP1]]
+;
+ %1 = sub i32 42, %X
+ ret i32 %1
+}
Index: clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected
@@ -9,10 +9,10 @@
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
-// CHECK-NEXT: [[NAMELESS0:%.*]] = load i64, i64* [[A_ADDR]], align 8
-// CHECK-NEXT: [[NAMELESS1:%.*]] = load i32, i32* [[B_ADDR]], align 4
-// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[NAMELESS1]] to i64
-// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[NAMELESS0]], [[CONV]]
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
+// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
+// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
// CHECK-NEXT: ret i64 [[ADD]]
//
long test(long a, int b) {
@@ -29,12 +29,12 @@
// CHECK-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
// CHECK-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4
-// CHECK-NEXT: [[NAMELESS0:%.*]] = load i64, i64* [[A_ADDR]], align 8
-// CHECK-NEXT: [[NAMELESS1:%.*]] = load i32, i32* [[B_ADDR]], align 4
-// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[NAMELESS1]] to i64
-// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[NAMELESS0]], [[CONV]]
-// CHECK-NEXT: [[NAMELESS2:%.*]] = load i32, i32* [[C_ADDR]], align 4
-// CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[NAMELESS2]] to i64
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
+// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
+// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[C_ADDR]], align 4
+// CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64
// CHECK-NEXT: [[ADD2:%.*]] = add nsw i64 [[ADD]], [[CONV1]]
// CHECK-NEXT: ret i64 [[ADD2]]
//
Index: clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.expected
@@ -8,10 +8,10 @@
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store i64 [[A:%.*]], i64* [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B:%.*]], i32* [[B_ADDR]], align 4
-// CHECK-NEXT: [[NAMELESS0:%.*]] = load i64, i64* [[A_ADDR]], align 8
-// CHECK-NEXT: [[NAMELESS1:%.*]] = load i32, i32* [[B_ADDR]], align 4
-// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[NAMELESS1]] to i64
-// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[NAMELESS0]], [[CONV]]
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
+// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
+// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
// CHECK-NEXT: ret i64 [[ADD]]
//
long test(long a, int b) {
@@ -27,12 +27,12 @@
// CHECK-NEXT: store i64 [[A:%.*]], i64* [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B:%.*]], i32* [[B_ADDR]], align 4
// CHECK-NEXT: store i32 [[C:%.*]], i32* [[C_ADDR]], align 4
-// CHECK-NEXT: [[NAMELESS0:%.*]] = load i64, i64* [[A_ADDR]], align 8
-// CHECK-NEXT: [[NAMELESS1:%.*]] = load i32, i32* [[B_ADDR]], align 4
-// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[NAMELESS1]] to i64
-// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[NAMELESS0]], [[CONV]]
-// CHECK-NEXT: [[NAMELESS2:%.*]] = load i32, i32* [[C_ADDR]], align 4
-// CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[NAMELESS2]] to i64
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
+// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
+// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[C_ADDR]], align 4
+// CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64
// CHECK-NEXT: [[ADD2:%.*]] = add nsw i64 [[ADD]], [[CONV1]]
// CHECK-NEXT: ret i64 [[ADD2]]
//
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