On Mon, Sep 27, 2021 at 11:20 AM Brent Hilpert via cctalk <cctalk@classiccmp.org> wrote: > > The 82S23 programming algorithm is in the 1975 Signetics Bipolar Memories > databook (also on bitsavers). > Looks like it may be a little more complex than that for the 188.
http://www.bitsavers.org/components/signetics/_dataBooks/1977_Signetics_Bipolar_and_MOS_Memory.pdf Page 91, timing diagram on Page 92 82S23 PROGRAMMING PROCEDURE 1. Terminate all device outputs with a 10K Ohm resistor to Vcc. 2. Select the address to be programmed, and raise Vcc to Vccp = +10 ± 0.5V. 3. After 10us delay, apply Iout = 65 ± 3mA to the output to be programmed. Program one output at a time. 4. After 10us delay, pulse the /CE input to logic low for 0.3 to 0.5us. 5. After 10us delay, remove Iout from the programmed output. 6. After 10us delay, return Vcc to 0V. 7. To verify programming, after 50us delay, raise Vcc to Vcch = +5.5 ± 0.2V, and apply a logic low level to the /CE input. The programmed output should remain in the high state. Again, lower Vcc to Vccl = +4.5 ± 0.2V, and verify that the programmed output remains in the high state. 8. Raise Vcc to Vccp = +10 ± 0.5V and repeat steps 3 through 7 to program other bits at the same address. 9. After 10us delay, repeat steps 2 through 8 to program all other address locations. http://www.bitsavers.org/components/signetics/_dataBooks/1975_Signetics_Bipolar_Memories.pdf Page 24, timing diagram on Page 25 Same as above, except different timing in step 4. 4. After 10us delay, pulse the /CE input to logic "0" for 1 to 2 ms. (of course in case of typos above, refer to the manuals)
