On Mon, 2021-06-21 at 16:13 -0400, Paul Koning via cctalk wrote: > The registers may actually be implemented as memory (PDP-6 and PDP-10 > without the "fast registers" feature), and perhaps the Philips PR8000 > which had 8 sets of 8 registers, one per interrupt level. > Independently, registers may appear in the memory address space, as > in the PDP-10 or the Electrologica X8.
Univac 1108 had two sets of registers, selected by a bit in the Processor Status Word. The "interrupt" set was automatically selected when an interrupt occurred, so interrupt-service code didn't need to save registers. They were made from thin-film magnetic memory, not semiconductors. They occupied "core" locations starting at zero. There was "core" behind them that could be accessed by setting the indirect- address bit in the instruction word -- which actually did indirect addressing if the address wasn't in the register file. In each set, there were 16 index (X) registers, although X0 always contained zero, 16 accumulator (A) registers, and 16 general-purpose (R) registers. R0 was the real-time clock. R1 was for block instructions. R2 was for mask instructions. X12-X15 and A0-A3 were actually the same overlapping registers so you could do "accumulator stuff" to calculate index registers, and then not need to move the result.
