Wow. Very nicely done! Which logic analyzer did you use to capture those displays?
73 Eugene W2HX ________________________________________ From: cctalk <cctalk-boun...@classiccmp.org> on behalf of Joseph Zatarski via cctalk <cctalk@classiccmp.org> Sent: Sunday, November 24, 2019 1:28 AM To: General Discussion: On-Topic Posts Subject: Re: DEC KA650 VAX memory troubleshooting Well, I finally got around to posting this on the CHWiki, in case anybody was curious about this. https://gunkies.org/wiki/DEC_KA650_Memory_Subsystem On 6/17/19 7:56 PM, Joe Zatarski wrote: > OK, so where should a thing like this go: https://pastebin.com/taQwaTV6 > > Anybody got a decent place to upload that? it's my notes on the > MS650-AA, and more generally the KA650 CMCTL memory subsystem. > > Includes my theory of operation of the CMCTL, the organization of > memory, the ECC equations (kinda, the info is there to derive them), > explanations of the signals on the memory bus, and most importantly, a > list of which bits and RAM regions correspond to the 312 DRAMs on the board. > > On Sat, Jun 15, 2019 at 8:33 PM Joe Zatarski <joezatar...@gmail.com > <mailto:joezatar...@gmail.com>> wrote: > > > > Hey Everyone, > > > > I just thought I'd share a video of how I'm going about > troubleshooting the bad DRAMs on my MS650 memory board. > > > > https://youtu.be/eDMhdAEFEgc > > > > I apologize for the shaky-cam, I don't have a tripod, and I needed to > do a lot of panning anyway. > > > > I will be sharing my notes on the MS650 once I have a chance to write > them up properly as well. I wasn't able to find a printset for the RAM > card itself, so I assume one doesn't exist in digital form yet. I have > documented what bit and memory range each DRAM on the card corresponds > to, which may help someone troubleshooting in the future > > > > Regards, > > Joe Zatarski
