> On Aug 4, 2017, at 3:46 PM, Noel Chiappa via cctalk <cctalk@classiccmp.org>
> wrote:
>
>> From: David Bridgham dab at froghouse.org
>
>> I'm going to have enough fun with trying to implement the USB stack in
>> the FPGA
>
> ISTR discussing putting a PDP-11 into the FPGA (there are Verilog PDP-11's
> available), so we could write our USB code in C (I'd use the Unix V6 compiler
> to compile it, of course :-).
That's a possibility. I've thought about using a rough approximation of a CDC
6000 series PPU for this sort of stuff, since it's a nice small instruction set
(and I have the VHDL for it already...) A more likely answer would be to find
a working Forth FPGA model and use that.
> ...
> I suspect the disk drive itself may be a big factor there. E.g. the PDP-11
> Peripherals Handbook lists the RK05 speed as 11 usec/word, so about 1.5
> Mbit/second.
>
> But I _know_ the UNIBUS is a lot faster than that; to verify that, look at
> the speed of non-cache PDP-11s (on which most instructions are
> memory-bandwidth - AKA UNIBUS bandwidth - limited).
A useful data point to remember is that a Unibus cannot quite keep up with an
Ethernet (10 Mb/s original one) receiving packets flat out. If I remember
right, Q-bus can, at least Q22 with its bust mode.
paul
