>> I guess it will require getting ahold of a backplane, and seeing what
>> I can find out with an ohm-meter.
> It looks like I'll still have to do this at some point, to confirm my
> theories about how the two busses are wired on the backplane
> (separation of UB and EUB address lines, and cross-connection of the
> data lines, for the EUB/SPC slots)
I have checked an -11/24 backplane, and the wiring is indeed as I
hypothesized (above).
> Another mystery: The "PDP-11 UNIBUS Processor Handbook" (1985) says
> (pg. 4-10) that in the 5.25" box, "only one MS11-P memory module can be
> configured". Anyone know the cause/source of that restriction?
> ...
> I can't come up with any technical rationale for that limit? Am I
> missing something? Or is it just DEC marketing, trying to limit how
> powerful the machine can be?
I would still be grateful for any insight from anyone about this.
Noel
