> And I'm very close to having a 360/65 in VHDL. > ----- > > Sweet :->. What FPGA platform are you using? Lawrence used a Spartan 3. Don't know how close to "full" he pushed it.
I'm using the XUPV5 PCIE board (Xilinx Virtex-5 XC5VLX110T); currently about 60% occupied, but the design needs lots of debugging. I'm only implementing the CPU on the FPGA, transcribing from the IBM ALDs. I/O channels will be provided by the Hercules emulator (with its cpu ripped out) on the system the PCIe card is plugged into.
