On 10/22/2015 10:54 PM, Don North wrote:
On 10/22/2015 9:27 PM, ben wrote:
On 10/22/2015 9:44 PM, Don North wrote:
I have one of the DE1 CycloneII device boards and at this point that
family (CycloneII) is a bit old.
If you can get it really cheap (<<$50) go for it, but the last Altera
toolset that supports CycloneII is v13.0sp1 (v15.0 is current).
I have moved most all my new experimentation on to the CycloneIV and
CycloneV family devices.
Well just give him your unwanted DE1 card (or sell it to him)
The GOTYA on the PDP11 stuff is it still uses the old SDC card
format 1GB or less.
If you plan to use a board going forward for some time, the newer
CycloneV based boards are a better choice:
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=13&List=Simple#Category167
If I said what I want to say about that
I would be banned from the list for foul language.
In particular the DE0-CV has a lot of nice features for implementing a
PDP-11 ($150):
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=921&PartNo=1
Too small and for some reason I can't get a keyboard to work with it.
Or if you want to go light on the hardware design and lean more on
embedded software, the DE0-NANO-SOC board ($99):
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=941
More fowl language comes to mind! I don't see any AHDL code
for using the dynamic ram. You mean I have BUY that code.
I think AHDL is cleaner to program in than the other options.
Is program the right term for hardware?
At this point I would stay away from CycloneIII or CycloneII boards
(unless you can get one very cheap) as the tech is older.
Sometimes older is better. They dropped both async set and clear from the
flip flops and just left clear. That is a BUG not a feature in my mind.
[sarcasm] wait Verlog and VHDL only use latches [end sarcasm]
Don
Ben.
Back to building a nice LS TTL computer in a FPGA.
Any one know the time the 74LS382 came out. The TTL data
book says Jan 1981/revised march 1988 for S and LS chip
Wow. What can I say. AHDL. I never used that even when it was current.
Proprietary to Altera. All of the warts of VHDL with none of the benefits.
Both Verlog and VHDL leave me puzzled just how they work as logic
black boxes. AHDL I can figure out how to pass parameters.
For PDP2011 direct compatibility then the path of least resistance is
probably
the DE0-NANO with CycloneIV for $79. I have several; nice little boards
for experimentation.
You can get it from Adafruit ($99) or Digikey as well. Direct from
Terasic has high shipping cost.
A quick look at the PDP2011 site says that is it is too small
for the optional PDP 11 features.
And if you are going to learn an FPGA development language look at
SystemVerilog/Verilog,
OpenCL, or VHDL. Certainly not AHDL. It was bad even when it was new. It
does not get better with age.
I'll go back to schematic entry before I touch them.
They FUCK!
Don
