Hello! While reading through the Intel manuals...
On Thu, Dec 21, 2006 at 12:45:11AM +0100, Samuel Thibault wrote: > Global pages permit to keep the kernel pages in the TLB whatever the > current process, here is a patch for supporting them. On my Pentium M, I > get a 5% speedup on dd < /dev/zero bs=1 > /dev/null . > 2006-12-19 Samuel Thibault <[EMAIL PROTECTED]> > > Add support for global pages. > * i386/i386at/model_dep.c: Include <i386/locore.h>. > (i386at_init): Set CR4_PGE if available. > --- i386/i386at/model_dep.c 26 Nov 2006 20:01:47 -0000 1.9.2.10 > kernel_page_dir[lin2pdenum(0)] = > kernel_page_dir[lin2pdenum(LINEAR_MIN_KERNEL_ADDRESS)]; > set_cr3((unsigned)kernel_page_dir); > + if (CPU_HAS_FEATURE(CPU_FEATURE_PGE)) > + set_cr4(get_cr4() | CR4_PGE); > set_cr0(get_cr0() | CR0_PG | CR0_WP); > flush_instr_queue(); Intel says that ``when enabling the global page feature, paging must be enabled (by setting the PG flag in control register CR0) before the PGE flag is set. Reversing this sequence may affect program correctness, and processor performance will be impacted.'' Aren't we currently doing it the wrong way round? Regards, Thomas
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