https://sourceware.org/bugzilla/show_bug.cgi?id=25599
--- Comment #10 from dave.anglin at bell dot net --- I think the test is wrong. The brl instruction is comprised of two instruction slots (L+X). For brl, the imm39 field and a 2-bit Ignored field occupy the L instruction slot. The actual branch instruction is in the second (X) slot. The PCREL relocation needs to be computed relative to this slot, so it makes sense that the relocation would be specified relative to this slot. The psABI says "P" is the address of the bundle containing the instruction. However, the brl instruction was introduced in itanium2 and it uses two instruction slots. I think the other L+X instructions (movl, break.x and nop.x) need checking with the PCREL60B and other relocations involving instruction placement. John, could you look at this? This is failing test: .text .proc foo# foo: .mlx mov r25 = r0 brl.call.sptk.many b0 = bar# .endp foo# I agree comment in the change needs an update. Even if the HP linker is wrong, it's important that we get the brl instruction working on HPUX so that current versions of gcc will build. -- You are receiving this mail because: You are on the CC list for the bug.
