> From: Vincent Legoll <vincent.leg...@gmail.com>
> Date: Sun, 6 Apr 2025 19:12:55 +0000
>
> Hi Mark,
>
> On Sun, Apr 6, 2025 at 7:08 PM Mark Kettenis <mark.kette...@xs4all.nl>
> wrote:
>
> We don't have support for the RK3528 SoC yet. In particular there is
> no support for this SoC in the rkclock(4) and rkpinctrl(4) drivers
> yet. That is probably why some of the devices don't work properly.
>
> Adding support shouldn't be particularly difficult. Let me know if
> you want to have a go at it. Otherwise, I'll see what I can do for
> you once 7.7 is out of the door.
>
> I'd certainly like to help, but I don't really know where to start. I'll
> need
> a bit of mentoring I think...
So, to start, do you have another OpenBSD/arm64 system on which you
can compile kernels? If so, apply the following patch, build a kernel
and copy that onto the uSD from which you're booting the machine.
This should print some stuff that'll help us adding the most important
clocks that we need to support.
Cheers,
Mark
Index: dev/fdt/rkclock.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/rkclock.c,v
diff -u -p -r1.91 rkclock.c
--- dev/fdt/rkclock.c 24 Nov 2024 22:19:59 -0000 1.91
+++ dev/fdt/rkclock.c 8 Apr 2025 19:50:18 -0000
@@ -299,6 +299,13 @@ int rk3399_pmu_set_frequency(void *, uin
void rk3399_pmu_enable(void *, uint32_t *, int);
void rk3399_pmu_reset(void *, uint32_t *, int);
+void rk3528_init(struct rkclock_softc *);
+uint32_t rk3528_get_frequency(void *, uint32_t *);
+int rk3528_set_frequency(void *, uint32_t *, uint32_t);
+int rk3528_set_parent(void *, uint32_t *, uint32_t *);
+void rk3528_enable(void *, uint32_t *, int);
+void rk3528_reset(void *, uint32_t *, int);
+
void rk3568_init(struct rkclock_softc *);
uint32_t rk3568_get_frequency(void *, uint32_t *);
int rk3568_set_frequency(void *, uint32_t *, uint32_t);
@@ -362,6 +369,12 @@ const struct rkclock_compat rkclock_comp
rk3399_pmu_reset
},
{
+ "rockchip,rk3528-cru", NULL, 1, rk3528_init,
+ rk3528_enable, rk3528_get_frequency,
+ rk3528_set_frequency, rk3568_set_parent,
+ rk3528_reset
+ },
+ {
"rockchip,rk3568-cru", "CRU", 1, rk3568_init,
rk3568_enable, rk3568_get_frequency,
rk3568_set_frequency, rk3568_set_parent,
@@ -3138,6 +3151,72 @@ rk3399_pmu_reset(void *cookie, uint32_t
uint32_t idx = cells[0];
printf("%s: 0x%08x\n", __func__, idx);
+}
+
+/*
+ * Rockchip RK3528
+ */
+
+const struct rkclock rk3528_clocks[] = {
+ {
+ /* Sentinel */
+ }
+};
+
+void
+rk3528_init(struct rkclock_softc *sc)
+{
+ sc->sc_clocks = rk3528_clocks;
+}
+
+uint32_t
+rk3528_get_frequency(void *cookie, uint32_t *cells)
+{
+ struct rkclock_softc *sc = cookie;
+ uint32_t idx = cells[0];
+
+ return rkclock_get_frequency(sc, idx);
+}
+
+int
+rk3528_set_frequency(void *cookie, uint32_t *cells, uint32_t freq)
+{
+ struct rkclock_softc *sc = cookie;
+ uint32_t idx = cells[0];
+
+ return rkclock_set_frequency(sc, idx, freq);
+}
+
+int
+rk3528_set_parent(void *cookie, uint32_t *cells, uint32_t *pcells)
+{
+ struct rkclock_softc *sc = cookie;
+
+ return rkclock_set_parent(sc, cells[0], pcells[1]);
+}
+
+void
+rk3528_enable(void *cookie, uint32_t *cells, int on)
+{
+ uint32_t idx = cells[0];
+
+ /* All clocks are enabled upon hardware reset. */
+ if (!on) {
+ printf("%s: 0x%08x\n", __func__, idx);
+ return;
+ }
+}
+
+void
+rk3528_reset(void *cookie, uint32_t *cells, int on)
+{
+ uint32_t idx = cells[0];
+
+ switch (idx) {
+ default:
+ printf("%s: 0x%08x\n", __func__, idx);
+ return;
+ }
}
/*
