> From: Lear Zhou <lhzho...@gmail.com> > Date: Sat, 23 May 2020 11:51:10 -0700 > > Hi, > > Thanks for the OpenBSD developers, now I can run 6.7 on my Rock64 v2. > However, > there's no cpu dynamic frequency adjust it seems. > > sysctl hw output: > hw.machine=arm64 > hw.model=ARM Cortex-A53 r0p4 > hw.ncpu=4 > hw.byteorder=1234 > hw.pagesize=4096 > hw.disknames=sd0:682a6643f5752b65 > hw.diskcount=1 > hw.product=Pine64 Rock64 > hw.serialno=d12da74ba2971686 > hw.physmem=1006903296 > hw.usermem=1006891008 > hw.ncpufound=4 > hw.allowpowerdown=1 > hw.ncpuonline=4 > > It's not the same as r2s that I've been testing, which has the same cpu as > Rock64 > and DO have perfpolicy.
That is almost certainly because the device tree provided by the bootloader doesn't have the necessary information to enable DVFS. If you install the dtb package and do: # mount /dev/sd0i /mnt # mkdir /mnt/rockchip # cp /usr/local/share/dtb/arm64/rockchip/rk3328-rock64.dtb /mnt/rockchip # umount /mnt # reboot DVFS should work. Cheers, Mark > The dmesg is as follows: > OpenBSD 6.7 (GENERIC.MP) #1: Sat May 16 15:59:24 MDT 2020 > r...@syspatch-67-arm64.openbsd.org:/usr/src/sys/arch/arm64/compile/ > GENERIC.MP > real mem = 1006903296 (960MB) > avail mem = 945872896 (902MB) > mainbus0 at root: Pine64 Rock64 > cpu0 at mainbus0 mpidr 0: ARM Cortex-A53 r0p4 > cpu0: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache > cpu0: 256KB 64b/line 16-way L2 cache > efi0 at mainbus0: UEFI 2.8 > efi0: Das U-Boot rev 0x20200100 > apm0 at mainbus0 > psci0 at mainbus0: PSCI 1.1, SMCCC 1.1 > syscon0 at mainbus0: "syscon" > "io-domains" at syscon0 not configured > syscon1 at mainbus0: "power-management" > rkclock0 at mainbus0 > rkclock_set_frequency: 0x00000145 > rkclock_set_frequency: 0x00000045 > rkclock_set_frequency: 0x0000003e > rkclock_set_frequency: 0x000000e5 > rkclock_set_frequency: 0x00000092 > rkclock_set_frequency: 0x000000dc > rkclock_set_frequency: 0x00000061 > ampintc0 at mainbus0 nirq 160, ncpu 4 ipi: 0, 1: "interrupt-controller" > rkpinctrl0 at mainbus0: "pinctrl" > rkgpio0 at rkpinctrl0 > rkgpio1 at rkpinctrl0 > rkgpio2 at rkpinctrl0 > rkgpio3 at rkpinctrl0 > "fit-images" at mainbus0 not configured > "opp_table0" at mainbus0 not configured > "arm-pmu" at mainbus0 not configured > agtimer0 at mainbus0: tick rate 24000 KHz > "xin24m" at mainbus0 not configured > com0 at mainbus0: ns16550, no working fifo > com0: console > rkiic0 at mainbus0 > iic0 at rkiic0 > rkpmic0 at iic0 addr 0x18: RK805 > "spi" at mainbus0 not configured > simplebus0 at mainbus0: "amba" > "dmac" at simplebus0 not configured > dwmmc0 at mainbus0: 50 MHz base clock > sdmmc0 at dwmmc0: 4-bit, sd high-speed, mmc high-speed, dma > dwmmc1 at mainbus0: 50 MHz base clock > sdmmc1 at dwmmc1: 8-bit, mmc high-speed, dma > dwge0 at mainbus0: address 6e:71:32:69:67:73 > rgephy0 at dwge0 phy 0: RTL8169S/8110S/8211 PHY, rev. 6 > ehci0 at mainbus0 > usb0 at ehci0: USB revision 2.0 > uhub0 at usb0 configuration 1 interface 0 "Generic EHCI root hub" rev > 2.00/1.00 addr 1 > ohci0 at mainbus0: version 1.0 > "usb" at mainbus0 not configured > "external-gmac-clock" at mainbus0 not configured > "sdmmc-regulator" at mainbus0 not configured > "vcc-host-5v-regulator" at mainbus0 not configured > "vcc-sys" at mainbus0 not configured > "dmc" at mainbus0 not configured > "usb" at mainbus0 not configured > cpu1 at mainbus0 mpidr 1: ARM Cortex-A53 r0p4 > cpu1: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache > cpu1: 256KB 64b/line 16-way L2 cache > cpu2 at mainbus0 mpidr 2: ARM Cortex-A53 r0p4 > cpu2: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache > cpu2: 256KB 64b/line 16-way L2 cache > cpu3 at mainbus0 mpidr 3: ARM Cortex-A53 r0p4 > cpu3: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache > cpu3: 256KB 64b/line 16-way L2 cache > usb1 at ohci0: USB revision 1.0 > uhub1 at usb1 configuration 1 interface 0 "Generic OHCI root hub" rev > 1.00/1.00 addr 1 > scsibus0 at sdmmc0: 2 targets, initiator 0 > sd0 at scsibus0 targ 1 lun 0: <SD/MMC, SB16G, 0080> removable > sd0: 15193MB, 512 bytes/sector, 31116288 sectors > sdmmc1: can't enable card > vscsi0 at root > scsibus1 at vscsi0: 256 targets > softraid0 at root > scsibus2 at softraid0: 256 targets > bootfile: sd0a:/bsd > boot device: sd0 > root on sd0a (682a6643f5752b65.a) swap on sd0b dump on sd0b > WARNING: bad clock chip time > WARNING: CHECK AND RESET THE DATE! > cpu0: clock not implemented > > Lear Zhou >
